1# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV 2# RUN: llc -O0 -mtriple arm-linux-gnueabi -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-AEABI,ARM-AEABI 3# RUN: llc -O0 -mtriple arm-linux-gnu -mattr=+hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV 4# RUN: llc -O0 -mtriple arm-linux-gnu -mattr=-hwdiv-arm -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-DEFAULT,ARM-DEFAULT 5# RUN: llc -O0 -mtriple thumb-linux-gnueabi -mattr=+v6t2,+hwdiv -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV 6# RUN: llc -O0 -mtriple thumb-linux-gnueabi -mattr=+v6t2,-hwdiv -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-AEABI,THUMB-AEABI 7# RUN: llc -O0 -mtriple thumb-linux-gnu -mattr=+v6t2,+hwdiv -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,HWDIV 8# RUN: llc -O0 -mtriple thumb-linux-gnu -mattr=+v6t2,-hwdiv -run-pass=legalizer %s -o - | FileCheck %s -check-prefixes=CHECK,SOFT,SOFT-DEFAULT,THUMB-DEFAULT 9--- | 10 define void @test_sdiv_i32() { ret void } 11 define void @test_udiv_i32() { ret void } 12 13 define void @test_sdiv_i16() { ret void } 14 define void @test_udiv_i16() { ret void } 15 16 define void @test_sdiv_i8() { ret void } 17 define void @test_udiv_i8() { ret void } 18 19 define void @test_srem_i32() { ret void } 20 define void @test_urem_i32() { ret void } 21 22 define void @test_srem_i16() { ret void } 23 define void @test_urem_i16() { ret void } 24 25 define void @test_srem_i8() { ret void } 26 define void @test_urem_i8() { ret void } 27... 28--- 29name: test_sdiv_i32 30# CHECK-LABEL: name: test_sdiv_i32 31legalized: false 32# CHECK: legalized: true 33regBankSelected: false 34selected: false 35tracksRegLiveness: true 36registers: 37 - { id: 0, class: _ } 38 - { id: 1, class: _ } 39 - { id: 2, class: _ } 40body: | 41 bb.0: 42 liveins: $r0, $r1 43 44 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 45 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 46 %0(s32) = COPY $r0 47 %1(s32) = COPY $r1 48 ; HWDIV: [[R:%[0-9]+]]:_(s32) = G_SDIV [[X]], [[Y]] 49 ; SOFT-NOT: G_SDIV 50 ; SOFT: ADJCALLSTACKDOWN 51 ; SOFT-DAG: $r0 = COPY [[X]] 52 ; SOFT-DAG: $r1 = COPY [[Y]] 53 ; ARM-AEABI: BL &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 54 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 55 ; ARM-DEFAULT: BL &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 56 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 57 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 58 ; SOFT: ADJCALLSTACKUP 59 ; SOFT-NOT: G_SDIV 60 %2(s32) = G_SDIV %0, %1 61 ; CHECK: $r0 = COPY [[R]] 62 $r0 = COPY %2(s32) 63 BX_RET 14 /* CC::al */, $noreg, implicit $r0 64... 65--- 66name: test_udiv_i32 67# CHECK-LABEL: name: test_udiv_i32 68legalized: false 69# CHECK: legalized: true 70regBankSelected: false 71selected: false 72tracksRegLiveness: true 73registers: 74 - { id: 0, class: _ } 75 - { id: 1, class: _ } 76 - { id: 2, class: _ } 77body: | 78 bb.0: 79 liveins: $r0, $r1 80 81 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 82 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 83 %0(s32) = COPY $r0 84 %1(s32) = COPY $r1 85 ; HWDIV: [[R:%[0-9]+]]:_(s32) = G_UDIV [[X]], [[Y]] 86 ; SOFT-NOT: G_UDIV 87 ; SOFT: ADJCALLSTACKDOWN 88 ; SOFT-DAG: $r0 = COPY [[X]] 89 ; SOFT-DAG: $r1 = COPY [[Y]] 90 ; ARM-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 91 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 92 ; ARM-DEFAULT: BL &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 93 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 94 ; SOFT: [[R:%[0-9]+]]:_(s32) = COPY $r0 95 ; SOFT: ADJCALLSTACKUP 96 ; SOFT-NOT: G_UDIV 97 %2(s32) = G_UDIV %0, %1 98 ; CHECK: $r0 = COPY [[R]] 99 $r0 = COPY %2(s32) 100 BX_RET 14 /* CC::al */, $noreg, implicit $r0 101... 102--- 103name: test_sdiv_i16 104# CHECK-LABEL: name: test_sdiv_i16 105legalized: false 106# CHECK: legalized: true 107regBankSelected: false 108selected: false 109tracksRegLiveness: true 110registers: 111 - { id: 0, class: _ } 112 - { id: 1, class: _ } 113 - { id: 2, class: _ } 114 - { id: 3, class: _ } 115 - { id: 4, class: _ } 116 - { id: 5, class: _ } 117body: | 118 bb.0: 119 liveins: $r0, $r1 120 121 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 122 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 123 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 124 ; leading to the following complicated sequences. 125 ; CHECK-DAG: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 126 ; CHECK-DAG: [[SHIFTEDX:%[0-9]+]]:_(s32) = G_SHL [[R0]], [[BITS]] 127 ; CHECK-DAG: [[X32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDX]], [[BITS]] 128 ; CHECK-DAG: [[SHIFTEDY:%[0-9]+]]:_(s32) = G_SHL [[R1]], [[BITS]] 129 ; CHECK-DAG: [[Y32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDY]], [[BITS]] 130 %0(s32) = COPY $r0 131 %1(s16) = G_TRUNC %0(s32) 132 %2(s32) = COPY $r1 133 %3(s16) = G_TRUNC %2(s32) 134 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SDIV [[X32]], [[Y32]] 135 ; SOFT-NOT: G_SDIV 136 ; SOFT: ADJCALLSTACKDOWN 137 ; SOFT-DAG: $r0 = COPY [[X32]] 138 ; SOFT-DAG: $r1 = COPY [[Y32]] 139 ; ARM-AEABI: BL &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 140 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 141 ; ARM-DEFAULT: BL &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 142 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 143 ; SOFT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 144 ; SOFT: ADJCALLSTACKUP 145 ; SOFT-NOT: G_SDIV 146 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR 147 ; SOFT-NOT: G_SDIV 148 %4(s16) = G_SDIV %1, %3 149 ; CHECK: $r0 = COPY [[R]] 150 %5(s32) = G_SEXT %4(s16) 151 $r0 = COPY %5(s32) 152 BX_RET 14 /* CC::al */, $noreg, implicit $r0 153... 154--- 155name: test_udiv_i16 156# CHECK-LABEL: name: test_udiv_i16 157legalized: false 158# CHECK: legalized: true 159regBankSelected: false 160selected: false 161tracksRegLiveness: true 162registers: 163 - { id: 0, class: _ } 164 - { id: 1, class: _ } 165 - { id: 2, class: _ } 166 - { id: 3, class: _ } 167 - { id: 4, class: _ } 168 - { id: 5, class: _ } 169body: | 170 bb.0: 171 liveins: $r0, $r1 172 173 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 174 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 175 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 176 ; leading to the following complicated sequences. 177 ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 178 ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_AND [[R0]], [[BITS]] 179 ; CHECK: [[Y32:%[0-9]+]]:_(s32) = G_AND [[R1]], [[BITS]] 180 %0(s32) = COPY $r0 181 %1(s16) = G_TRUNC %0(s32) 182 %2(s32) = COPY $r1 183 %3(s16) = G_TRUNC %2(s32) 184 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_UDIV [[X32]], [[Y32]] 185 ; SOFT-NOT: G_UDIV 186 ; SOFT: ADJCALLSTACKDOWN 187 ; SOFT-DAG: $r0 = COPY [[X32]] 188 ; SOFT-DAG: $r1 = COPY [[Y32]] 189 ; ARM-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 190 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 191 ; ARM-DEFAULT: BL &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 192 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 193 ; SOFT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 194 ; SOFT: ADJCALLSTACKUP 195 ; SOFT-NOT: G_UDIV 196 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_AND 197 ; SOFT-NOT: G_UDIV 198 %4(s16) = G_UDIV %1, %3 199 ; CHECK: $r0 = COPY [[R]] 200 %5(s32) = G_ZEXT %4(s16) 201 $r0 = COPY %5(s32) 202 BX_RET 14 /* CC::al */, $noreg, implicit $r0 203... 204--- 205name: test_sdiv_i8 206# CHECK-LABEL: name: test_sdiv_i8 207legalized: false 208# CHECK: legalized: true 209regBankSelected: false 210selected: false 211tracksRegLiveness: true 212registers: 213 - { id: 0, class: _ } 214 - { id: 1, class: _ } 215 - { id: 2, class: _ } 216 - { id: 3, class: _ } 217 - { id: 4, class: _ } 218 - { id: 5, class: _ } 219body: | 220 bb.0: 221 liveins: $r0, $r1 222 223 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 224 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 225 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 226 ; leading to the following complicated sequences. 227 ; CHECK-DAG: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 228 ; CHECK-DAG: [[SHIFTEDX:%[0-9]+]]:_(s32) = G_SHL [[R0]], [[BITS]] 229 ; CHECK-DAG: [[X32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDX]], [[BITS]] 230 ; CHECK-DAG: [[SHIFTEDY:%[0-9]+]]:_(s32) = G_SHL [[R1]], [[BITS]] 231 ; CHECK-DAG: [[Y32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDY]], [[BITS]] 232 %0(s32) = COPY $r0 233 %1(s8) = G_TRUNC %0(s32) 234 %2(s32) = COPY $r1 235 %3(s8) = G_TRUNC %2(s32) 236 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SDIV [[X32]], [[Y32]] 237 ; SOFT-NOT: G_SDIV 238 ; SOFT: ADJCALLSTACKDOWN 239 ; SOFT-DAG: $r0 = COPY [[X32]] 240 ; SOFT-DAG: $r1 = COPY [[Y32]] 241 ; ARM-AEABI: BL &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 242 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 243 ; ARM-DEFAULT: BL &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 244 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__divsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 245 ; SOFT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 246 ; SOFT: ADJCALLSTACKUP 247 ; SOFT-NOT: G_SDIV 248 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR 249 ; SOFT-NOT: G_SDIV 250 %4(s8) = G_SDIV %1, %3 251 ; CHECK: $r0 = COPY [[R]] 252 %5(s32) = G_SEXT %4(s8) 253 $r0 = COPY %5(s32) 254 BX_RET 14 /* CC::al */, $noreg, implicit $r0 255... 256--- 257name: test_udiv_i8 258# CHECK-LABEL: name: test_udiv_i8 259legalized: false 260# CHECK: legalized: true 261regBankSelected: false 262selected: false 263tracksRegLiveness: true 264registers: 265 - { id: 0, class: _ } 266 - { id: 1, class: _ } 267 - { id: 2, class: _ } 268 - { id: 3, class: _ } 269 - { id: 4, class: _ } 270 - { id: 5, class: _ } 271body: | 272 bb.0: 273 liveins: $r0, $r1 274 275 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 276 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 277 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 278 ; leading to the following complicated sequences. 279 ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 280 ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_AND [[R0]], [[BITS]] 281 ; CHECK: [[Y32:%[0-9]+]]:_(s32) = G_AND [[R1]], [[BITS]] 282 %0(s32) = COPY $r0 283 %1(s8) = G_TRUNC %0(s32) 284 %2(s32) = COPY $r1 285 %3(s8) = G_TRUNC %2(s32) 286 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_UDIV [[X32]], [[Y32]] 287 ; SOFT-NOT: G_UDIV 288 ; SOFT: ADJCALLSTACKDOWN 289 ; SOFT-DAG: $r0 = COPY [[X32]] 290 ; SOFT-DAG: $r1 = COPY [[Y32]] 291 ; ARM-AEABI: BL &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 292 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidiv, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 293 ; ARM-DEFAULT: BL &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 294 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__udivsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 295 ; SOFT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 296 ; SOFT: ADJCALLSTACKUP 297 ; SOFT-NOT: G_UDIV 298 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_AND 299 ; SOFT-NOT: G_UDIV 300 %4(s8) = G_UDIV %1, %3 301 ; CHECK: $r0 = COPY [[R]] 302 %5(s32) = G_ZEXT %4(s8) 303 $r0 = COPY %5(s32) 304 BX_RET 14 /* CC::al */, $noreg, implicit $r0 305... 306--- 307name: test_srem_i32 308# CHECK-LABEL: name: test_srem_i32 309legalized: false 310# CHECK: legalized: true 311regBankSelected: false 312selected: false 313tracksRegLiveness: true 314registers: 315 - { id: 0, class: _ } 316 - { id: 1, class: _ } 317 - { id: 2, class: _ } 318body: | 319 bb.0: 320 liveins: $r0, $r1 321 322 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 323 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 324 %0(s32) = COPY $r0 325 %1(s32) = COPY $r1 326 ; HWDIV: [[Q:%[0-9]+]]:_(s32) = G_SDIV [[X]], [[Y]] 327 ; HWDIV: [[P:%[0-9]+]]:_(s32) = G_MUL [[Q]], [[Y]] 328 ; HWDIV: [[R:%[0-9]+]]:_(s32) = G_SUB [[X]], [[P]] 329 ; SOFT-NOT: G_SREM 330 ; SOFT: ADJCALLSTACKDOWN 331 ; SOFT-DAG: $r0 = COPY [[X]] 332 ; SOFT-DAG: $r1 = COPY [[Y]] 333 ; ARM-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0, implicit-def $r1 334 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0, implicit-def $r1 335 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY $r1 336 ; ARM-DEFAULT: BL &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 337 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 338 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY $r0 339 ; SOFT: ADJCALLSTACKUP 340 ; SOFT-NOT: G_SREM 341 %2(s32) = G_SREM %0, %1 342 ; CHECK: $r0 = COPY [[R]] 343 $r0 = COPY %2(s32) 344 BX_RET 14 /* CC::al */, $noreg, implicit $r0 345... 346--- 347name: test_urem_i32 348# CHECK-LABEL: name: test_urem_i32 349legalized: false 350# CHECK: legalized: true 351regBankSelected: false 352selected: false 353tracksRegLiveness: true 354registers: 355 - { id: 0, class: _ } 356 - { id: 1, class: _ } 357 - { id: 2, class: _ } 358body: | 359 bb.0: 360 liveins: $r0, $r1 361 362 ; CHECK-DAG: [[X:%[0-9]+]]:_(s32) = COPY $r0 363 ; CHECK-DAG: [[Y:%[0-9]+]]:_(s32) = COPY $r1 364 %0(s32) = COPY $r0 365 %1(s32) = COPY $r1 366 ; HWDIV: [[Q:%[0-9]+]]:_(s32) = G_UDIV [[X]], [[Y]] 367 ; HWDIV: [[P:%[0-9]+]]:_(s32) = G_MUL [[Q]], [[Y]] 368 ; HWDIV: [[R:%[0-9]+]]:_(s32) = G_SUB [[X]], [[P]] 369 ; SOFT-NOT: G_UREM 370 ; SOFT: ADJCALLSTACKDOWN 371 ; SOFT-DAG: $r0 = COPY [[X]] 372 ; SOFT-DAG: $r1 = COPY [[Y]] 373 ; ARM-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0, implicit-def $r1 374 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0, implicit-def $r1 375 ; SOFT-AEABI: [[R:%[0-9]+]]:_(s32) = COPY $r1 376 ; ARM-DEFAULT: BL &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 377 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 378 ; SOFT-DEFAULT: [[R:%[0-9]+]]:_(s32) = COPY $r0 379 ; SOFT: ADJCALLSTACKUP 380 ; SOFT-NOT: G_UREM 381 %2(s32) = G_UREM %0, %1 382 ; CHECK: $r0 = COPY [[R]] 383 $r0 = COPY %2(s32) 384 BX_RET 14 /* CC::al */, $noreg, implicit $r0 385... 386--- 387name: test_srem_i16 388# CHECK-LABEL: name: test_srem_i16 389legalized: false 390# CHECK: legalized: true 391regBankSelected: false 392selected: false 393tracksRegLiveness: true 394registers: 395 - { id: 0, class: _ } 396 - { id: 1, class: _ } 397 - { id: 2, class: _ } 398 - { id: 3, class: _ } 399 - { id: 4, class: _ } 400 - { id: 5, class: _ } 401body: | 402 bb.0: 403 liveins: $r0, $r1 404 405 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 406 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 407 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 408 ; leading to the following complicated sequences. 409 ; CHECK-DAG: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 410 ; CHECK-DAG: [[SHIFTEDX:%[0-9]+]]:_(s32) = G_SHL [[R0]], [[BITS]] 411 ; CHECK-DAG: [[X32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDX]], [[BITS]] 412 ; CHECK-DAG: [[SHIFTEDY:%[0-9]+]]:_(s32) = G_SHL [[R1]], [[BITS]] 413 ; CHECK-DAG: [[Y32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDY]], [[BITS]] 414 %0(s32) = COPY $r0 415 %1(s16) = G_TRUNC %0(s32) 416 %2(s32) = COPY $r1 417 %3(s16) = G_TRUNC %2(s32) 418 ; HWDIV: [[Q32:%[0-9]+]]:_(s32) = G_SDIV [[X32]], [[Y32]] 419 ; HWDIV: [[P32:%[0-9]+]]:_(s32) = G_MUL [[Q32]], [[Y32]] 420 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SUB [[X32]], [[P32]] 421 ; SOFT-NOT: G_SREM 422 ; SOFT: ADJCALLSTACKDOWN 423 ; SOFT-DAG: $r0 = COPY [[X32]] 424 ; SOFT-DAG: $r1 = COPY [[Y32]] 425 ; ARM-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 426 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 427 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY $r1 428 ; ARM-DEFAULT: BL &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 429 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 430 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 431 ; SOFT: ADJCALLSTACKUP 432 ; SOFT-NOT: G_SREM 433 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR 434 ; SOFT-NOT: G_SREM 435 %4(s16) = G_SREM %1, %3 436 ; CHECK: $r0 = COPY [[R]] 437 %5(s32) = G_SEXT %4(s16) 438 $r0 = COPY %5(s32) 439 BX_RET 14 /* CC::al */, $noreg, implicit $r0 440... 441--- 442name: test_urem_i16 443# CHECK-LABEL: name: test_urem_i16 444legalized: false 445# CHECK: legalized: true 446regBankSelected: false 447selected: false 448tracksRegLiveness: true 449registers: 450 - { id: 0, class: _ } 451 - { id: 1, class: _ } 452 - { id: 2, class: _ } 453 - { id: 3, class: _ } 454 - { id: 4, class: _ } 455 - { id: 5, class: _ } 456body: | 457 bb.0: 458 liveins: $r0, $r1 459 460 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 461 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 462 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 463 ; leading to the following complicated sequences. 464 ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 465 ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_AND [[R0]], [[BITS]] 466 ; CHECK: [[Y32:%[0-9]+]]:_(s32) = G_AND [[R1]], [[BITS]] 467 %0(s32) = COPY $r0 468 %1(s16) = G_TRUNC %0(s32) 469 %2(s32) = COPY $r1 470 %3(s16) = G_TRUNC %2(s32) 471 ; HWDIV: [[Q32:%[0-9]+]]:_(s32) = G_UDIV [[X32]], [[Y32]] 472 ; HWDIV: [[P32:%[0-9]+]]:_(s32) = G_MUL [[Q32]], [[Y32]] 473 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SUB [[X32]], [[P32]] 474 ; SOFT-NOT: G_UREM 475 ; SOFT: ADJCALLSTACKDOWN 476 ; SOFT-DAG: $r0 = COPY [[X32]] 477 ; SOFT-DAG: $r1 = COPY [[Y32]] 478 ; ARM-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 479 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 480 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY $r1 481 ; ARM-DEFAULT: BL &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 482 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 483 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 484 ; SOFT: ADJCALLSTACKUP 485 ; SOFT-NOT: G_UREM 486 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_AND 487 ; SOFT-NOT: G_UREM 488 %4(s16) = G_UREM %1, %3 489 ; CHECK: $r0 = COPY [[R]] 490 %5(s32) = G_ZEXT %4(s16) 491 $r0 = COPY %5(s32) 492 BX_RET 14 /* CC::al */, $noreg, implicit $r0 493... 494--- 495name: test_srem_i8 496# CHECK-LABEL: name: test_srem_i8 497legalized: false 498# CHECK: legalized: true 499regBankSelected: false 500selected: false 501tracksRegLiveness: true 502registers: 503 - { id: 0, class: _ } 504 - { id: 1, class: _ } 505 - { id: 2, class: _ } 506 - { id: 3, class: _ } 507 - { id: 4, class: _ } 508 - { id: 5, class: _ } 509body: | 510 bb.0: 511 liveins: $r0, $r1 512 513 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 514 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 515 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 516 ; leading to the following complicated sequences. 517 ; CHECK-DAG: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 518 ; CHECK-DAG: [[SHIFTEDX:%[0-9]+]]:_(s32) = G_SHL [[R0]], [[BITS]] 519 ; CHECK-DAG: [[X32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDX]], [[BITS]] 520 ; CHECK-DAG: [[SHIFTEDY:%[0-9]+]]:_(s32) = G_SHL [[R1]], [[BITS]] 521 ; CHECK-DAG: [[Y32:%[0-9]+]]:_(s32) = G_ASHR [[SHIFTEDY]], [[BITS]] 522 %0(s32) = COPY $r0 523 %1(s8) = G_TRUNC %0(s32) 524 %2(s32) = COPY $r1 525 %3(s8) = G_TRUNC %2(s32) 526 ; HWDIV: [[Q32:%[0-9]+]]:_(s32) = G_SDIV [[X32]], [[Y32]] 527 ; HWDIV: [[P32:%[0-9]+]]:_(s32) = G_MUL [[Q32]], [[Y32]] 528 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SUB [[X32]], [[P32]] 529 ; SOFT-NOT: G_SREM 530 ; SOFT: ADJCALLSTACKDOWN 531 ; SOFT-DAG: $r0 = COPY [[X32]] 532 ; SOFT-DAG: $r1 = COPY [[Y32]] 533 ; ARM-AEABI: BL &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 534 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_idivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 535 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY $r1 536 ; ARM-DEFAULT: BL &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 537 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__modsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 538 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 539 ; SOFT: ADJCALLSTACKUP 540 ; SOFT-NOT: G_SREM 541 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_ASHR 542 ; SOFT-NOT: G_SREM 543 %4(s8) = G_SREM %1, %3 544 ; CHECK: $r0 = COPY [[R]] 545 %5(s32) = G_SEXT %4(s8) 546 $r0 = COPY %5(s32) 547 BX_RET 14 /* CC::al */, $noreg, implicit $r0 548... 549--- 550name: test_urem_i8 551# CHECK-LABEL: name: test_urem_i8 552legalized: false 553# CHECK: legalized: true 554regBankSelected: false 555selected: false 556tracksRegLiveness: true 557registers: 558 - { id: 0, class: _ } 559 - { id: 1, class: _ } 560 - { id: 2, class: _ } 561 - { id: 3, class: _ } 562 - { id: 4, class: _ } 563 - { id: 5, class: _ } 564body: | 565 bb.0: 566 liveins: $r0, $r1 567 568 ; CHECK-DAG: [[R0:%[0-9]+]]:_(s32) = COPY $r0 569 ; CHECK-DAG: [[R1:%[0-9]+]]:_(s32) = COPY $r1 570 ; The G_TRUNC will combine with the extensions introduced by the legalizer, 571 ; leading to the following complicated sequences. 572 ; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 573 ; CHECK: [[X32:%[0-9]+]]:_(s32) = G_AND [[R0]], [[BITS]] 574 ; CHECK: [[Y32:%[0-9]+]]:_(s32) = G_AND [[R1]], [[BITS]] 575 %0(s32) = COPY $r0 576 %1(s8) = G_TRUNC %0(s32) 577 %2(s32) = COPY $r1 578 %3(s8) = G_TRUNC %2(s32) 579 ; HWDIV: [[Q32:%[0-9]+]]:_(s32) = G_UDIV [[X32]], [[Y32]] 580 ; HWDIV: [[P32:%[0-9]+]]:_(s32) = G_MUL [[Q32]], [[Y32]] 581 ; HWDIV: [[R32:%[0-9]+]]:_(s32) = G_SUB [[X32]], [[P32]] 582 ; SOFT-NOT: G_UREM 583 ; SOFT: ADJCALLSTACKDOWN 584 ; SOFT-DAG: $r0 = COPY [[X32]] 585 ; SOFT-DAG: $r1 = COPY [[Y32]] 586 ; ARM-AEABI: BL &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 587 ; THUMB-AEABI: tBL 14 /* CC::al */, $noreg, &__aeabi_uidivmod, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 588 ; SOFT-AEABI: [[R32:%[0-9]+]]:_(s32) = COPY $r1 589 ; ARM-DEFAULT: BL &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 590 ; THUMB-DEFAULT: tBL 14 /* CC::al */, $noreg, &__umodsi3, {{.*}}, implicit $r0, implicit $r1, implicit-def $r0 591 ; SOFT-DEFAULT: [[R32:%[0-9]+]]:_(s32) = COPY $r0 592 ; SOFT: ADJCALLSTACKUP 593 ; SOFT-NOT: G_UREM 594 ; CHECK: [[R:%[0-9]+]]:_(s32) = G_AND 595 ; SOFT-NOT: G_UREM 596 %4(s8) = G_UREM %1, %3 597 ; CHECK: $r0 = COPY [[R]] 598 %5(s32) = G_ZEXT %4(s8) 599 $r0 = COPY %5(s32) 600 BX_RET 14 /* CC::al */, $noreg, implicit $r0 601... 602