1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -O0 -mtriple arm-- -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3--- | 4 define void @test_trunc_and_zext_s1_to_s32() { ret void } 5 define void @test_trunc_and_sext_s1_to_s32() { ret void } 6 define void @test_trunc_and_sext_s8_to_s32() { ret void } 7 define void @test_trunc_and_zext_s16_to_s32() { ret void } 8 define void @test_trunc_and_anyext_s8_to_s32() { ret void } 9 define void @test_trunc_and_anyext_s16_to_s32() { ret void } 10 11 define void @test_trunc_and_zext_s1_to_s16() { ret void } 12 define void @test_trunc_and_sext_s1_to_s16() { ret void } 13 define void @test_trunc_and_anyext_s1_to_s16() { ret void } 14 15 define void @test_trunc_and_zext_s8_to_s16() { ret void } 16 define void @test_trunc_and_sext_s8_to_s16() { ret void } 17 define void @test_trunc_and_anyext_s8_to_s16() { ret void } 18 19 define void @test_trunc_and_zext_s1_to_s8() { ret void } 20 define void @test_trunc_and_sext_s1_to_s8() { ret void } 21 define void @test_trunc_and_anyext_s1_to_s8() { ret void } 22 23 define void @test_add_s32() { ret void } 24 define void @test_add_fold_imm_s32() { ret void } 25 define void @test_add_no_fold_imm_s32() #2 { ret void } 26 27 define void @test_sub_s32() { ret void } 28 define void @test_sub_imm_s32() { ret void } 29 define void @test_sub_rev_imm_s32() { ret void } 30 31 define void @test_mul_s32() #0 { ret void } 32 define void @test_mulv5_s32() { ret void } 33 34 define void @test_sdiv_s32() #1 { ret void } 35 define void @test_udiv_s32() #1 { ret void } 36 37 define void @test_lshr_s32() { ret void } 38 define void @test_ashr_s32() { ret void } 39 define void @test_shl_s32() { ret void } 40 41 define void @test_load_from_stack() { ret void } 42 43 define void @test_stores() { ret void } 44 45 define void @test_gep() { ret void } 46 47 define void @test_MOVi32imm() #2 { ret void } 48 49 define void @test_constant_imm() { ret void } 50 define void @test_constant_cimm() { ret void } 51 52 define void @test_pointer_constant_unconstrained() { ret void } 53 define void @test_pointer_constant_constrained() { ret void } 54 55 define void @test_inttoptr_s32() { ret void } 56 define void @test_ptrtoint_s32() { ret void } 57 58 define void @test_select_s32() { ret void } 59 define void @test_select_ptr() { ret void } 60 61 define void @test_br() { ret void } 62 63 define void @test_phi_s32() { ret void } 64 65 attributes #0 = { "target-features"="+v6" } 66 attributes #1 = { "target-features"="+hwdiv-arm" } 67 attributes #2 = { "target-features"="+v6t2" } 68... 69--- 70name: test_trunc_and_zext_s1_to_s32 71legalized: true 72regBankSelected: true 73selected: false 74registers: 75 - { id: 0, class: gprb } 76 - { id: 1, class: gprb } 77 - { id: 2, class: gprb } 78body: | 79 bb.0: 80 liveins: $r0 81 82 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s32 83 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 84 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY]], 1, 14 /* CC::al */, $noreg, $noreg 85 ; CHECK: $r0 = COPY [[ANDri]] 86 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 87 %0(s32) = COPY $r0 88 89 %1(s1) = G_TRUNC %0(s32) 90 91 %2(s32) = G_ZEXT %1(s1) 92 93 $r0 = COPY %2(s32) 94 95 BX_RET 14, $noreg, implicit $r0 96... 97--- 98name: test_trunc_and_sext_s1_to_s32 99legalized: true 100regBankSelected: true 101selected: false 102registers: 103 - { id: 0, class: gprb } 104 - { id: 1, class: gprb } 105 - { id: 2, class: gprb } 106body: | 107 bb.0: 108 liveins: $r0 109 110 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s32 111 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 112 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY]], 1, 14 /* CC::al */, $noreg, $noreg 113 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg 114 ; CHECK: $r0 = COPY [[RSBri]] 115 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 116 %0(s32) = COPY $r0 117 118 %1(s1) = G_TRUNC %0(s32) 119 120 %2(s32) = G_SEXT %1(s1) 121 122 $r0 = COPY %2(s32) 123 124 BX_RET 14, $noreg, implicit $r0 125... 126--- 127name: test_trunc_and_sext_s8_to_s32 128legalized: true 129regBankSelected: true 130selected: false 131registers: 132 - { id: 0, class: gprb } 133 - { id: 1, class: gprb } 134 - { id: 2, class: gprb } 135body: | 136 bb.0: 137 liveins: $r0 138 139 ; CHECK-LABEL: name: test_trunc_and_sext_s8_to_s32 140 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 141 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY [[COPY]] 142 ; CHECK: [[SXTB:%[0-9]+]]:gprnopc = SXTB [[COPY1]], 0, 14 /* CC::al */, $noreg 143 ; CHECK: $r0 = COPY [[SXTB]] 144 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 145 %0(s32) = COPY $r0 146 147 %1(s8) = G_TRUNC %0(s32) 148 149 %2(s32) = G_SEXT %1(s8) 150 151 $r0 = COPY %2(s32) 152 153 BX_RET 14, $noreg, implicit $r0 154... 155--- 156name: test_trunc_and_zext_s16_to_s32 157legalized: true 158regBankSelected: true 159selected: false 160registers: 161 - { id: 0, class: gprb } 162 - { id: 1, class: gprb } 163 - { id: 2, class: gprb } 164body: | 165 bb.0: 166 liveins: $r0 167 168 ; CHECK-LABEL: name: test_trunc_and_zext_s16_to_s32 169 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 170 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY [[COPY]] 171 ; CHECK: [[UXTH:%[0-9]+]]:gprnopc = UXTH [[COPY1]], 0, 14 /* CC::al */, $noreg 172 ; CHECK: $r0 = COPY [[UXTH]] 173 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 174 %0(s32) = COPY $r0 175 176 %1(s16) = G_TRUNC %0(s32) 177 178 %2(s32) = G_ZEXT %1(s16) 179 180 $r0 = COPY %2(s32) 181 182 BX_RET 14, $noreg, implicit $r0 183... 184--- 185name: test_trunc_and_anyext_s8_to_s32 186legalized: true 187regBankSelected: true 188selected: false 189registers: 190 - { id: 0, class: gprb } 191 - { id: 1, class: gprb } 192 - { id: 2, class: gprb } 193body: | 194 bb.0: 195 liveins: $r0 196 197 ; CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s32 198 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 199 ; CHECK: $r0 = COPY [[COPY]] 200 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 201 %0(s32) = COPY $r0 202 203 %1(s8) = G_TRUNC %0(s32) 204 205 %2(s32) = G_ANYEXT %1(s8) 206 207 $r0 = COPY %2(s32) 208 209 BX_RET 14, $noreg, implicit $r0 210... 211--- 212name: test_trunc_and_anyext_s16_to_s32 213legalized: true 214regBankSelected: true 215selected: false 216registers: 217 - { id: 0, class: gprb } 218 - { id: 1, class: gprb } 219 - { id: 2, class: gprb } 220body: | 221 bb.0: 222 liveins: $r0 223 224 ; CHECK-LABEL: name: test_trunc_and_anyext_s16_to_s32 225 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 226 ; CHECK: $r0 = COPY [[COPY]] 227 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 228 %0(s32) = COPY $r0 229 230 %1(s16) = G_TRUNC %0(s32) 231 232 %2(s32) = G_ANYEXT %1(s16) 233 234 $r0 = COPY %2(s32) 235 236 BX_RET 14, $noreg, implicit $r0 237... 238--- 239name: test_trunc_and_zext_s1_to_s16 240legalized: true 241regBankSelected: true 242selected: false 243tracksRegLiveness: true 244registers: 245 - { id: 0, class: gprb } 246 - { id: 1, class: gprb } 247 - { id: 2, class: gprb } 248 - { id: 3, class: gprb } 249body: | 250 bb.0: 251 liveins: $r0, $r1 252 253 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s16 254 ; CHECK: liveins: $r0, $r1 255 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 256 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 257 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg 258 ; CHECK: STRH [[ANDri]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 259 ; CHECK: BX_RET 14 /* CC::al */, $noreg 260 %0(p0) = COPY $r0 261 262 %1(s32) = COPY $r1 263 264 %2(s1) = G_TRUNC %1(s32) 265 266 %3(s16) = G_ZEXT %2(s1) 267 268 G_STORE %3(s16), %0(p0) :: (store (s16)) 269 270 BX_RET 14, $noreg 271... 272--- 273name: test_trunc_and_sext_s1_to_s16 274legalized: true 275regBankSelected: true 276selected: false 277tracksRegLiveness: true 278registers: 279 - { id: 0, class: gprb } 280 - { id: 1, class: gprb } 281 - { id: 2, class: gprb } 282 - { id: 3, class: gprb } 283body: | 284 bb.0: 285 liveins: $r0, $r1 286 287 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s16 288 ; CHECK: liveins: $r0, $r1 289 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 290 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 291 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg 292 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg 293 ; CHECK: STRH [[RSBri]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 294 ; CHECK: BX_RET 14 /* CC::al */, $noreg 295 %0(p0) = COPY $r0 296 297 %1(s32) = COPY $r1 298 299 %2(s1) = G_TRUNC %1(s32) 300 301 %3(s16) = G_SEXT %2(s1) 302 303 G_STORE %3(s16), %0(p0) :: (store (s16)) 304 305 BX_RET 14, $noreg 306... 307--- 308name: test_trunc_and_anyext_s1_to_s16 309legalized: true 310regBankSelected: true 311selected: false 312tracksRegLiveness: true 313registers: 314 - { id: 0, class: gprb } 315 - { id: 1, class: gprb } 316 - { id: 2, class: gprb } 317 - { id: 3, class: gprb } 318body: | 319 bb.0: 320 liveins: $r0, $r1 321 322 ; CHECK-LABEL: name: test_trunc_and_anyext_s1_to_s16 323 ; CHECK: liveins: $r0, $r1 324 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 325 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 326 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 327 ; CHECK: BX_RET 14 /* CC::al */, $noreg 328 %0(p0) = COPY $r0 329 330 %1(s32) = COPY $r1 331 332 %2(s1) = G_TRUNC %1(s32) 333 334 %3(s16) = G_ANYEXT %2(s1) 335 336 G_STORE %3(s16), %0(p0) :: (store (s16)) 337 338 BX_RET 14, $noreg 339... 340--- 341name: test_trunc_and_zext_s8_to_s16 342legalized: true 343regBankSelected: true 344selected: false 345tracksRegLiveness: true 346registers: 347 - { id: 0, class: gprb } 348 - { id: 1, class: gprb } 349 - { id: 2, class: gprb } 350 - { id: 3, class: gprb } 351body: | 352 bb.0: 353 liveins: $r0, $r1 354 355 ; CHECK-LABEL: name: test_trunc_and_zext_s8_to_s16 356 ; CHECK: liveins: $r0, $r1 357 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 358 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 359 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]] 360 ; CHECK: [[UXTB:%[0-9]+]]:gprnopc = UXTB [[COPY2]], 0, 14 /* CC::al */, $noreg 361 ; CHECK: STRH [[UXTB]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 362 ; CHECK: BX_RET 14 /* CC::al */, $noreg 363 %0(p0) = COPY $r0 364 365 %1(s32) = COPY $r1 366 367 %2(s8) = G_TRUNC %1(s32) 368 369 %3(s16) = G_ZEXT %2(s8) 370 371 G_STORE %3(s16), %0(p0) :: (store (s16)) 372 373 BX_RET 14, $noreg 374... 375--- 376name: test_trunc_and_sext_s8_to_s16 377legalized: true 378regBankSelected: true 379selected: false 380tracksRegLiveness: true 381registers: 382 - { id: 0, class: gprb } 383 - { id: 1, class: gprb } 384 - { id: 2, class: gprb } 385 - { id: 3, class: gprb } 386body: | 387 bb.0: 388 liveins: $r0, $r1 389 390 ; CHECK-LABEL: name: test_trunc_and_sext_s8_to_s16 391 ; CHECK: liveins: $r0, $r1 392 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 393 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 394 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]] 395 ; CHECK: [[SXTB:%[0-9]+]]:gprnopc = SXTB [[COPY2]], 0, 14 /* CC::al */, $noreg 396 ; CHECK: STRH [[SXTB]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 397 ; CHECK: BX_RET 14 /* CC::al */, $noreg 398 %0(p0) = COPY $r0 399 400 %1(s32) = COPY $r1 401 402 %2(s8) = G_TRUNC %1(s32) 403 404 %3(s16) = G_SEXT %2(s8) 405 406 G_STORE %3(s16), %0(p0) :: (store (s16)) 407 408 BX_RET 14, $noreg 409... 410--- 411name: test_trunc_and_anyext_s8_to_s16 412legalized: true 413regBankSelected: true 414selected: false 415tracksRegLiveness: true 416registers: 417 - { id: 0, class: gprb } 418 - { id: 1, class: gprb } 419 - { id: 2, class: gprb } 420 - { id: 3, class: gprb } 421body: | 422 bb.0: 423 liveins: $r0, $r1 424 425 ; CHECK-LABEL: name: test_trunc_and_anyext_s8_to_s16 426 ; CHECK: liveins: $r0, $r1 427 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 428 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 429 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 430 ; CHECK: BX_RET 14 /* CC::al */, $noreg 431 %0(p0) = COPY $r0 432 433 %1(s32) = COPY $r1 434 435 %2(s8) = G_TRUNC %1(s32) 436 437 %3(s16) = G_ANYEXT %2(s8) 438 439 G_STORE %3(s16), %0(p0) :: (store (s16)) 440 441 BX_RET 14, $noreg 442... 443--- 444name: test_trunc_and_zext_s1_to_s8 445legalized: true 446regBankSelected: true 447selected: false 448tracksRegLiveness: true 449registers: 450 - { id: 0, class: gprb } 451 - { id: 1, class: gprb } 452 - { id: 2, class: gprb } 453 - { id: 3, class: gprb } 454body: | 455 bb.0: 456 liveins: $r0, $r1 457 458 ; CHECK-LABEL: name: test_trunc_and_zext_s1_to_s8 459 ; CHECK: liveins: $r0, $r1 460 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 461 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 462 ; CHECK: [[ANDri:%[0-9]+]]:gprnopc = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg 463 ; CHECK: STRBi12 [[ANDri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8)) 464 ; CHECK: BX_RET 14 /* CC::al */, $noreg 465 %0(p0) = COPY $r0 466 467 %1(s32) = COPY $r1 468 469 %2(s1) = G_TRUNC %1(s32) 470 471 %3(s8) = G_ZEXT %2(s1) 472 473 G_STORE %3(s8), %0(p0) :: (store (s8)) 474 475 BX_RET 14, $noreg 476... 477--- 478name: test_trunc_and_sext_s1_to_s8 479legalized: true 480regBankSelected: true 481selected: false 482tracksRegLiveness: true 483registers: 484 - { id: 0, class: gprb } 485 - { id: 1, class: gprb } 486 - { id: 2, class: gprb } 487 - { id: 3, class: gprb } 488body: | 489 bb.0: 490 liveins: $r0, $r1 491 492 ; CHECK-LABEL: name: test_trunc_and_sext_s1_to_s8 493 ; CHECK: liveins: $r0, $r1 494 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 495 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 496 ; CHECK: [[ANDri:%[0-9]+]]:gpr = ANDri [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg 497 ; CHECK: [[RSBri:%[0-9]+]]:gprnopc = RSBri [[ANDri]], 0, 14 /* CC::al */, $noreg, $noreg 498 ; CHECK: STRBi12 [[RSBri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8)) 499 ; CHECK: BX_RET 14 /* CC::al */, $noreg 500 %0(p0) = COPY $r0 501 502 %1(s32) = COPY $r1 503 504 %2(s1) = G_TRUNC %1(s32) 505 506 %3(s8) = G_SEXT %2(s1) 507 508 G_STORE %3(s8), %0(p0) :: (store (s8)) 509 510 BX_RET 14, $noreg 511... 512--- 513name: test_trunc_and_anyext_s1_to_s8 514legalized: true 515regBankSelected: true 516selected: false 517tracksRegLiveness: true 518registers: 519 - { id: 0, class: gprb } 520 - { id: 1, class: gprb } 521 - { id: 2, class: gprb } 522 - { id: 3, class: gprb } 523body: | 524 bb.0: 525 liveins: $r0, $r1 526 527 ; CHECK-LABEL: name: test_trunc_and_anyext_s1_to_s8 528 ; CHECK: liveins: $r0, $r1 529 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 530 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 531 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]] 532 ; CHECK: STRBi12 [[COPY2]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8)) 533 ; CHECK: BX_RET 14 /* CC::al */, $noreg 534 %0(p0) = COPY $r0 535 536 %1(s32) = COPY $r1 537 538 %2(s1) = G_TRUNC %1(s32) 539 540 %3(s8) = G_ANYEXT %2(s1) 541 542 G_STORE %3(s8), %0(p0) :: (store (s8)) 543 544 BX_RET 14, $noreg 545... 546--- 547name: test_add_s32 548legalized: true 549regBankSelected: true 550selected: false 551registers: 552 - { id: 0, class: gprb } 553 - { id: 1, class: gprb } 554 - { id: 2, class: gprb } 555body: | 556 bb.0: 557 liveins: $r0, $r1 558 559 ; CHECK-LABEL: name: test_add_s32 560 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 561 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 562 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 563 ; CHECK: $r0 = COPY [[ADDrr]] 564 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 565 %0(s32) = COPY $r0 566 567 %1(s32) = COPY $r1 568 569 %2(s32) = G_ADD %0, %1 570 571 $r0 = COPY %2(s32) 572 573 BX_RET 14, $noreg, implicit $r0 574... 575--- 576name: test_add_fold_imm_s32 577legalized: true 578regBankSelected: true 579selected: false 580registers: 581 - { id: 0, class: gprb } 582 - { id: 1, class: gprb } 583 - { id: 2, class: gprb } 584body: | 585 bb.0: 586 liveins: $r0 587 588 ; CHECK-LABEL: name: test_add_fold_imm_s32 589 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 590 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri [[COPY]], 255, 14 /* CC::al */, $noreg, $noreg 591 ; CHECK: $r0 = COPY [[ADDri]] 592 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 593 %0(s32) = COPY $r0 594 595 %1(s32) = G_CONSTANT i32 255 596 %2(s32) = G_ADD %0, %1 597 598 $r0 = COPY %2(s32) 599 600 BX_RET 14, $noreg, implicit $r0 601... 602--- 603name: test_add_no_fold_imm_s32 604legalized: true 605regBankSelected: true 606selected: false 607registers: 608 - { id: 0, class: gprb } 609 - { id: 1, class: gprb } 610 - { id: 2, class: gprb } 611body: | 612 bb.0: 613 liveins: $r0 614 615 ; CHECK-LABEL: name: test_add_no_fold_imm_s32 616 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 617 ; CHECK: [[MOVi16_:%[0-9]+]]:gpr = MOVi16 65535, 14 /* CC::al */, $noreg 618 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[MOVi16_]], 14 /* CC::al */, $noreg, $noreg 619 ; CHECK: $r0 = COPY [[ADDrr]] 620 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 621 %0(s32) = COPY $r0 622 623 %1(s32) = G_CONSTANT i32 65535 624 625 %2(s32) = G_ADD %0, %1 626 627 $r0 = COPY %2(s32) 628 629 BX_RET 14, $noreg, implicit $r0 630... 631--- 632name: test_sub_s32 633legalized: true 634regBankSelected: true 635selected: false 636registers: 637 - { id: 0, class: gprb } 638 - { id: 1, class: gprb } 639 - { id: 2, class: gprb } 640body: | 641 bb.0: 642 liveins: $r0, $r1 643 644 ; CHECK-LABEL: name: test_sub_s32 645 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 646 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 647 ; CHECK: [[SUBrr:%[0-9]+]]:gpr = SUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 648 ; CHECK: $r0 = COPY [[SUBrr]] 649 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 650 %0(s32) = COPY $r0 651 652 %1(s32) = COPY $r1 653 654 %2(s32) = G_SUB %0, %1 655 656 $r0 = COPY %2(s32) 657 658 BX_RET 14, $noreg, implicit $r0 659... 660--- 661name: test_sub_imm_s32 662legalized: true 663regBankSelected: true 664selected: false 665registers: 666 - { id: 0, class: gprb } 667 - { id: 1, class: gprb } 668 - { id: 2, class: gprb } 669body: | 670 bb.0: 671 liveins: $r0, $r1 672 673 ; CHECK-LABEL: name: test_sub_imm_s32 674 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 675 ; CHECK: [[SUBri:%[0-9]+]]:gpr = SUBri [[COPY]], 17, 14 /* CC::al */, $noreg, $noreg 676 ; CHECK: $r0 = COPY [[SUBri]] 677 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 678 %0(s32) = COPY $r0 679 680 %1(s32) = G_CONSTANT i32 17 681 %2(s32) = G_SUB %0, %1 682 683 $r0 = COPY %2(s32) 684 685 BX_RET 14, $noreg, implicit $r0 686... 687--- 688name: test_sub_rev_imm_s32 689legalized: true 690regBankSelected: true 691selected: false 692registers: 693 - { id: 0, class: gprb } 694 - { id: 1, class: gprb } 695 - { id: 2, class: gprb } 696body: | 697 bb.0: 698 liveins: $r0, $r1 699 700 ; CHECK-LABEL: name: test_sub_rev_imm_s32 701 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 702 ; CHECK: [[RSBri:%[0-9]+]]:gpr = RSBri [[COPY]], 17, 14 /* CC::al */, $noreg, $noreg 703 ; CHECK: $r0 = COPY [[RSBri]] 704 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 705 %0(s32) = COPY $r0 706 707 %1(s32) = G_CONSTANT i32 17 708 %2(s32) = G_SUB %1, %0 709 710 $r0 = COPY %2(s32) 711 712 BX_RET 14, $noreg, implicit $r0 713... 714--- 715name: test_mul_s32 716legalized: true 717regBankSelected: true 718selected: false 719registers: 720 - { id: 0, class: gprb } 721 - { id: 1, class: gprb } 722 - { id: 2, class: gprb } 723body: | 724 bb.0: 725 liveins: $r0, $r1 726 727 ; CHECK-LABEL: name: test_mul_s32 728 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 729 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY $r1 730 ; CHECK: [[MUL:%[0-9]+]]:gprnopc = MUL [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 731 ; CHECK: $r0 = COPY [[MUL]] 732 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 733 %0(s32) = COPY $r0 734 735 %1(s32) = COPY $r1 736 737 %2(s32) = G_MUL %0, %1 738 739 $r0 = COPY %2(s32) 740 741 BX_RET 14, $noreg, implicit $r0 742... 743--- 744name: test_mulv5_s32 745legalized: true 746regBankSelected: true 747selected: false 748registers: 749 - { id: 0, class: gprb } 750 - { id: 1, class: gprb } 751 - { id: 2, class: gprb } 752body: | 753 bb.0: 754 liveins: $r0, $r1 755 756 ; CHECK-LABEL: name: test_mulv5_s32 757 ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0 758 ; CHECK: [[COPY1:%[0-9]+]]:gprnopc = COPY $r1 759 ; CHECK: early-clobber %2:gprnopc = MULv5 [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 760 ; CHECK: $r0 = COPY %2 761 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 762 %0(s32) = COPY $r0 763 764 %1(s32) = COPY $r1 765 766 %2(s32) = G_MUL %0, %1 767 768 $r0 = COPY %2(s32) 769 770 BX_RET 14, $noreg, implicit $r0 771... 772--- 773name: test_sdiv_s32 774legalized: true 775regBankSelected: true 776selected: false 777registers: 778 - { id: 0, class: gprb } 779 - { id: 1, class: gprb } 780 - { id: 2, class: gprb } 781body: | 782 bb.0: 783 liveins: $r0, $r1 784 785 ; CHECK-LABEL: name: test_sdiv_s32 786 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 787 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 788 ; CHECK: [[SDIV:%[0-9]+]]:gpr = SDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 789 ; CHECK: $r0 = COPY [[SDIV]] 790 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 791 %0(s32) = COPY $r0 792 793 %1(s32) = COPY $r1 794 795 %2(s32) = G_SDIV %0, %1 796 797 $r0 = COPY %2(s32) 798 799 BX_RET 14, $noreg, implicit $r0 800... 801--- 802name: test_udiv_s32 803legalized: true 804regBankSelected: true 805selected: false 806registers: 807 - { id: 0, class: gprb } 808 - { id: 1, class: gprb } 809 - { id: 2, class: gprb } 810body: | 811 bb.0: 812 liveins: $r0, $r1 813 814 ; CHECK-LABEL: name: test_udiv_s32 815 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 816 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 817 ; CHECK: [[UDIV:%[0-9]+]]:gpr = UDIV [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg 818 ; CHECK: $r0 = COPY [[UDIV]] 819 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 820 %0(s32) = COPY $r0 821 822 %1(s32) = COPY $r1 823 824 %2(s32) = G_UDIV %0, %1 825 826 $r0 = COPY %2(s32) 827 828 BX_RET 14, $noreg, implicit $r0 829... 830--- 831name: test_lshr_s32 832legalized: true 833regBankSelected: true 834selected: false 835registers: 836 - { id: 0, class: gprb } 837 - { id: 1, class: gprb } 838 - { id: 2, class: gprb } 839body: | 840 bb.0: 841 liveins: $r0, $r1 842 843 ; CHECK-LABEL: name: test_lshr_s32 844 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 845 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 846 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 3, 14 /* CC::al */, $noreg, $noreg 847 ; CHECK: $r0 = COPY [[MOVsr]] 848 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 849 %0(s32) = COPY $r0 850 851 %1(s32) = COPY $r1 852 853 %2(s32) = G_LSHR %0, %1 854 855 $r0 = COPY %2(s32) 856 857 BX_RET 14, $noreg, implicit $r0 858... 859--- 860name: test_ashr_s32 861legalized: true 862regBankSelected: true 863selected: false 864registers: 865 - { id: 0, class: gprb } 866 - { id: 1, class: gprb } 867 - { id: 2, class: gprb } 868body: | 869 bb.0: 870 liveins: $r0, $r1 871 872 ; CHECK-LABEL: name: test_ashr_s32 873 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 874 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 875 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 1, 14 /* CC::al */, $noreg, $noreg 876 ; CHECK: $r0 = COPY [[MOVsr]] 877 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 878 %0(s32) = COPY $r0 879 880 %1(s32) = COPY $r1 881 882 %2(s32) = G_ASHR %0, %1 883 884 $r0 = COPY %2(s32) 885 886 BX_RET 14, $noreg, implicit $r0 887... 888--- 889name: test_shl_s32 890legalized: true 891regBankSelected: true 892selected: false 893registers: 894 - { id: 0, class: gprb } 895 - { id: 1, class: gprb } 896 - { id: 2, class: gprb } 897body: | 898 bb.0: 899 liveins: $r0, $r1 900 901 ; CHECK-LABEL: name: test_shl_s32 902 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 903 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 904 ; CHECK: [[MOVsr:%[0-9]+]]:gprnopc = MOVsr [[COPY]], [[COPY1]], 2, 14 /* CC::al */, $noreg, $noreg 905 ; CHECK: $r0 = COPY [[MOVsr]] 906 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 907 %0(s32) = COPY $r0 908 909 %1(s32) = COPY $r1 910 911 %2(s32) = G_SHL %0, %1 912 913 $r0 = COPY %2(s32) 914 915 BX_RET 14, $noreg, implicit $r0 916... 917--- 918name: test_load_from_stack 919legalized: true 920regBankSelected: true 921selected: false 922registers: 923 - { id: 0, class: gprb } 924 - { id: 1, class: gprb } 925 - { id: 2, class: gprb } 926 - { id: 3, class: gprb } 927 - { id: 4, class: gprb } 928fixedStack: 929 - { id: 0, offset: 0, size: 1, alignment: 4, isImmutable: true, isAliased: false } 930 - { id: 1, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false } 931 - { id: 2, offset: 8, size: 4, alignment: 4, isImmutable: true, isAliased: false } 932body: | 933 bb.0: 934 liveins: $r0, $r1, $r2, $r3 935 936 ; CHECK-LABEL: name: test_load_from_stack 937 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri %fixed-stack.0, 0, 14 /* CC::al */, $noreg, $noreg 938 ; CHECK: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 [[ADDri]], 0, 14 /* CC::al */, $noreg :: (load (s32)) 939 ; CHECK: $r0 = COPY [[LDRi12_]] 940 ; CHECK: [[ADDri1:%[0-9]+]]:gpr = ADDri %fixed-stack.2, 0, 14 /* CC::al */, $noreg, $noreg 941 ; CHECK: [[LDRBi12_:%[0-9]+]]:gprnopc = LDRBi12 [[ADDri1]], 0, 14 /* CC::al */, $noreg :: (load (s8)) 942 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY [[LDRBi12_]] 943 ; CHECK: $r0 = COPY [[COPY]] 944 ; CHECK: BX_RET 14 /* CC::al */, $noreg 945 %0(p0) = G_FRAME_INDEX %fixed-stack.2 946 947 %1(s32) = G_LOAD %0(p0) :: (load (s32)) 948 949 $r0 = COPY %1 950 951 %2(p0) = G_FRAME_INDEX %fixed-stack.0 952 953 %3(s8) = G_LOAD %2(p0) :: (load (s8)) 954 955 %4(s32) = G_ANYEXT %3(s8) 956 957 $r0 = COPY %4 958 959 BX_RET 14, $noreg 960... 961--- 962name: test_stores 963legalized: true 964regBankSelected: true 965selected: false 966registers: 967 - { id: 0, class: gprb } 968 - { id: 1, class: gprb } 969 - { id: 2, class: gprb } 970 - { id: 3, class: gprb } 971 - { id: 4, class: gprb } 972body: | 973 bb.0: 974 liveins: $r0, $r1 975 976 ; CHECK-LABEL: name: test_stores 977 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 978 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 979 ; CHECK: [[COPY2:%[0-9]+]]:gprnopc = COPY [[COPY1]] 980 ; CHECK: STRBi12 [[COPY2]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s8)) 981 ; CHECK: STRH [[COPY1]], [[COPY]], $noreg, 0, 14 /* CC::al */, $noreg :: (store (s16)) 982 ; CHECK: STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32)) 983 ; CHECK: BX_RET 14 /* CC::al */, $noreg 984 %0(p0) = COPY $r0 985 986 %3(s32) = COPY $r1 987 988 %1(s8) = G_TRUNC %3(s32) 989 990 %2(s16) = G_TRUNC %3(s32) 991 992 G_STORE %1(s8), %0(p0) :: (store (s8)) 993 994 G_STORE %2(s16), %0(p0) :: (store (s16)) 995 996 G_STORE %3(s32), %0(p0) :: (store (s32)) 997 998 BX_RET 14, $noreg 999... 1000--- 1001name: test_gep 1002legalized: true 1003regBankSelected: true 1004selected: false 1005registers: 1006 - { id: 0, class: gprb } 1007 - { id: 1, class: gprb } 1008 - { id: 2, class: gprb } 1009body: | 1010 bb.0: 1011 liveins: $r0, $r1 1012 1013 ; CHECK-LABEL: name: test_gep 1014 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1015 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 1016 ; CHECK: [[ADDrr:%[0-9]+]]:gpr = ADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg, $noreg 1017 ; CHECK: $r0 = COPY [[ADDrr]] 1018 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1019 %0(p0) = COPY $r0 1020 1021 %1(s32) = COPY $r1 1022 1023 %2(p0) = G_PTR_ADD %0, %1(s32) 1024 1025 $r0 = COPY %2(p0) 1026 BX_RET 14, $noreg, implicit $r0 1027... 1028--- 1029name: test_MOVi32imm 1030legalized: true 1031regBankSelected: true 1032selected: false 1033registers: 1034 - { id: 0, class: gprb } 1035body: | 1036 bb.0: 1037 ; CHECK-LABEL: name: test_MOVi32imm 1038 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr = MOVi32imm 65537 1039 ; CHECK: $r0 = COPY [[MOVi32imm]] 1040 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1041 %0(s32) = G_CONSTANT i32 65537 1042 1043 $r0 = COPY %0(s32) 1044 BX_RET 14, $noreg, implicit $r0 1045... 1046--- 1047name: test_constant_imm 1048legalized: true 1049regBankSelected: true 1050selected: false 1051registers: 1052 - { id: 0, class: gprb } 1053body: | 1054 bb.0: 1055 ; CHECK-LABEL: name: test_constant_imm 1056 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 42, 14 /* CC::al */, $noreg, $noreg 1057 ; CHECK: $r0 = COPY [[MOVi]] 1058 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1059 %0(s32) = G_CONSTANT i32 42 1060 1061 $r0 = COPY %0(s32) 1062 BX_RET 14, $noreg, implicit $r0 1063... 1064--- 1065name: test_constant_cimm 1066legalized: true 1067regBankSelected: true 1068selected: false 1069registers: 1070 - { id: 0, class: gprb } 1071body: | 1072 bb.0: 1073 ; Adding a type on G_CONSTANT changes its operand from an Imm into a CImm. 1074 ; We still want to see the same thing in the output though. 1075 ; CHECK-LABEL: name: test_constant_cimm 1076 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 42, 14 /* CC::al */, $noreg, $noreg 1077 ; CHECK: $r0 = COPY [[MOVi]] 1078 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1079 %0(s32) = G_CONSTANT i32 42 1080 1081 $r0 = COPY %0(s32) 1082 BX_RET 14, $noreg, implicit $r0 1083... 1084--- 1085name: test_pointer_constant_unconstrained 1086legalized: true 1087regBankSelected: true 1088selected: false 1089registers: 1090 - { id: 0, class: gprb } 1091body: | 1092 bb.0: 1093 ; CHECK-LABEL: name: test_pointer_constant_unconstrained 1094 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg 1095 ; CHECK: $r0 = COPY [[MOVi]] 1096 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1097 %0(p0) = G_CONSTANT i32 0 1098 1099 ; This leaves %0 unconstrained before the G_CONSTANT is selected. 1100 $r0 = COPY %0(p0) 1101 BX_RET 14, $noreg, implicit $r0 1102... 1103--- 1104name: test_pointer_constant_constrained 1105legalized: true 1106regBankSelected: true 1107selected: false 1108registers: 1109 - { id: 0, class: gprb } 1110body: | 1111 bb.0: 1112 ; CHECK-LABEL: name: test_pointer_constant_constrained 1113 ; CHECK: [[MOVi:%[0-9]+]]:gpr = MOVi 0, 14 /* CC::al */, $noreg, $noreg 1114 ; CHECK: STRi12 [[MOVi]], [[MOVi]], 0, 14 /* CC::al */, $noreg :: (store (p0)) 1115 %0(p0) = G_CONSTANT i32 0 1116 1117 ; This constrains %0 before the G_CONSTANT is selected. 1118 G_STORE %0(p0), %0(p0) :: (store (p0)) 1119... 1120--- 1121name: test_inttoptr_s32 1122legalized: true 1123regBankSelected: true 1124selected: false 1125registers: 1126 - { id: 0, class: gprb } 1127 - { id: 1, class: gprb } 1128body: | 1129 bb.0: 1130 liveins: $r0 1131 1132 ; CHECK-LABEL: name: test_inttoptr_s32 1133 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1134 ; CHECK: $r0 = COPY [[COPY]] 1135 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1136 %0(s32) = COPY $r0 1137 %1(p0) = G_INTTOPTR %0(s32) 1138 1139 $r0 = COPY %1(p0) 1140 1141 BX_RET 14, $noreg, implicit $r0 1142... 1143--- 1144name: test_ptrtoint_s32 1145legalized: true 1146regBankSelected: true 1147selected: false 1148registers: 1149 - { id: 0, class: gprb } 1150 - { id: 1, class: gprb } 1151body: | 1152 bb.0: 1153 liveins: $r0 1154 1155 ; CHECK-LABEL: name: test_ptrtoint_s32 1156 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1157 ; CHECK: $r0 = COPY [[COPY]] 1158 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1159 %0(p0) = COPY $r0 1160 %1(s32) = G_PTRTOINT %0(p0) 1161 1162 $r0 = COPY %1(s32) 1163 1164 BX_RET 14, $noreg, implicit $r0 1165... 1166--- 1167name: test_select_s32 1168legalized: true 1169regBankSelected: true 1170selected: false 1171registers: 1172 - { id: 0, class: gprb } 1173 - { id: 1, class: gprb } 1174 - { id: 2, class: gprb } 1175 - { id: 3, class: gprb } 1176body: | 1177 bb.0: 1178 liveins: $r0, $r1 1179 1180 ; CHECK-LABEL: name: test_select_s32 1181 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1182 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 1183 ; CHECK: TSTri [[COPY1]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 1184 ; CHECK: [[MOVCCr:%[0-9]+]]:gpr = MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr 1185 ; CHECK: $r0 = COPY [[MOVCCr]] 1186 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1187 %0(s32) = COPY $r0 1188 1189 %1(s32) = COPY $r1 1190 1191 %2(s1) = G_TRUNC %1(s32) 1192 1193 %3(s32) = G_SELECT %2(s1), %0, %1 1194 1195 $r0 = COPY %3(s32) 1196 1197 BX_RET 14, $noreg, implicit $r0 1198... 1199--- 1200name: test_select_ptr 1201legalized: true 1202regBankSelected: true 1203selected: false 1204registers: 1205 - { id: 0, class: gprb } 1206 - { id: 1, class: gprb } 1207 - { id: 2, class: gprb } 1208 - { id: 3, class: gprb } 1209 - { id: 4, class: gprb } 1210body: | 1211 bb.0: 1212 liveins: $r0, $r1, $r2 1213 1214 ; CHECK-LABEL: name: test_select_ptr 1215 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1216 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 1217 ; CHECK: [[COPY2:%[0-9]+]]:gpr = COPY $r2 1218 ; CHECK: TSTri [[COPY2]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 1219 ; CHECK: [[MOVCCr:%[0-9]+]]:gpr = MOVCCr [[COPY]], [[COPY1]], 0 /* CC::eq */, $cpsr 1220 ; CHECK: $r0 = COPY [[MOVCCr]] 1221 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1222 %0(p0) = COPY $r0 1223 1224 %1(p0) = COPY $r1 1225 1226 %2(s32) = COPY $r2 1227 1228 %3(s1) = G_TRUNC %2(s32) 1229 1230 %4(p0) = G_SELECT %3(s1), %0, %1 1231 1232 $r0 = COPY %4(p0) 1233 1234 BX_RET 14, $noreg, implicit $r0 1235... 1236--- 1237name: test_br 1238legalized: true 1239regBankSelected: true 1240selected: false 1241registers: 1242 - { id: 0, class: gprb } 1243 - { id: 1, class: gprb } 1244body: | 1245 ; CHECK-LABEL: name: test_br 1246 ; CHECK: bb.0: 1247 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 1248 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1249 ; CHECK: TSTri [[COPY]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 1250 ; CHECK: Bcc %bb.1, 1 /* CC::ne */, $cpsr 1251 ; CHECK: B %bb.2 1252 ; CHECK: bb.1: 1253 ; CHECK: successors: %bb.2(0x80000000) 1254 ; CHECK: B %bb.2 1255 ; CHECK: bb.2: 1256 ; CHECK: BX_RET 14 /* CC::al */, $noreg 1257 bb.0: 1258 successors: %bb.1(0x40000000), %bb.2(0x40000000) 1259 liveins: $r0 1260 1261 %0(s32) = COPY $r0 1262 %1(s1) = G_TRUNC %0(s32) 1263 1264 G_BRCOND %1(s1), %bb.1 1265 G_BR %bb.2 1266 1267 bb.1: 1268 successors: %bb.2(0x80000000) 1269 1270 G_BR %bb.2 1271 1272 bb.2: 1273 1274 BX_RET 14, $noreg 1275... 1276--- 1277name: test_phi_s32 1278legalized: true 1279regBankSelected: true 1280selected: false 1281tracksRegLiveness: true 1282registers: 1283 - { id: 0, class: gprb } 1284 - { id: 1, class: gprb } 1285 - { id: 2, class: gprb } 1286 - { id: 3, class: gprb } 1287 - { id: 4, class: gprb } 1288body: | 1289 ; CHECK-LABEL: name: test_phi_s32 1290 ; CHECK: bb.0: 1291 ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) 1292 ; CHECK: liveins: $r0, $r1, $r2 1293 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $r0 1294 ; CHECK: [[COPY1:%[0-9]+]]:gpr = COPY $r1 1295 ; CHECK: [[COPY2:%[0-9]+]]:gpr = COPY $r2 1296 ; CHECK: TSTri [[COPY]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 1297 ; CHECK: Bcc %bb.1, 1 /* CC::ne */, $cpsr 1298 ; CHECK: B %bb.2 1299 ; CHECK: bb.1: 1300 ; CHECK: successors: %bb.2(0x80000000) 1301 ; CHECK: B %bb.2 1302 ; CHECK: bb.2: 1303 ; CHECK: [[PHI:%[0-9]+]]:gpr = PHI [[COPY1]], %bb.0, [[COPY2]], %bb.1 1304 ; CHECK: $r0 = COPY [[PHI]] 1305 ; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0 1306 bb.0: 1307 successors: %bb.1(0x40000000), %bb.2(0x40000000) 1308 liveins: $r0, $r1, $r2 1309 1310 %0(s32) = COPY $r0 1311 %1(s1) = G_TRUNC %0(s32) 1312 1313 %2(s32) = COPY $r1 1314 %3(s32) = COPY $r2 1315 1316 G_BRCOND %1(s1), %bb.1 1317 G_BR %bb.2 1318 1319 bb.1: 1320 successors: %bb.2(0x80000000) 1321 1322 G_BR %bb.2 1323 1324 bb.2: 1325 %4(s32) = G_PHI %2(s32), %bb.0, %3(s32), %bb.1 1326 1327 $r0 = COPY %4(s32) 1328 BX_RET 14, $noreg, implicit $r0 1329... 1330