xref: /llvm-project/llvm/test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll (revision bed1c7f061aa12417aa081e334afdba45767b938) 
1; RUN: llc %s -mtriple=thumbv7-apple-darwin -verify-machineinstrs -mcpu=cortex-a9 -O0 -o -
2; Make sure that the VMOVQQQQ pseudo instruction is handled properly
3; by codegen.
4
5define void @test_vmovqqqq_pseudo() nounwind ssp {
6entry:
7  %vld3_lane = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16.p0(ptr undef, <8 x i16> undef, <8 x i16> undef, <8 x i16> zeroinitializer, i32 7, i32 2)
8  store { <8 x i16>, <8 x i16>, <8 x i16> } %vld3_lane, ptr undef
9  ret void
10}
11
12declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16.p0(ptr, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
13