xref: /llvm-project/llvm/test/CodeGen/ARC/intrinsics.ll (revision 6e8718c3e32225c579a3a974be003c7f38c32a05)
1; RUN: llc -mtriple=arc < %s | FileCheck %s
2
3target triple = "arc"
4
5declare i32 @llvm.ctlz.i32(i32, i1)
6declare i32 @llvm.cttz.i32(i32, i1)
7declare i64 @llvm.readcyclecounter()
8
9; CHECK-LABEL: test_ctlz_i32:
10; CHECK:       fls.f   %r0, %r0
11; CHECK-NEXT:  mov.eq  %r0, 32
12; CHECK-NEXT:  rsub.ne %r0, %r0, 31
13define i32 @test_ctlz_i32(i32 %x) {
14  %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
15  ret i32 %a
16}
17
18; CHECK-LABEL: test_cttz_i32:
19; CHECK:       ffs.f   %r0, %r0
20; CHECK-NEXT:  mov.eq  %r0, 32
21define i32 @test_cttz_i32(i32 %x) {
22  %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
23  ret i32 %a
24}
25
26; CHECK-LABEL: test_readcyclecounter:
27; CHECK:       lr %r0, [33]
28; CHECK-NEXT:  mov %r1, 0
29define i64 @test_readcyclecounter() nounwind {
30  %a = call i64 @llvm.readcyclecounter()
31  ret i64 %a
32}
33