xref: /llvm-project/llvm/test/CodeGen/AMDGPU/waitcnt-multiple-funcs.mir (revision 8cae9dcd4a45ac78b22c05eff96b0fee3e1c5e55) 
1# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass si-insert-waitcnts -verify-machineinstrs %s -o - | FileCheck %s
2
3---
4# CHECK-LABEL: name: t1
5# CHECK: liveins: $vgpr0
6name: t1
7tracksRegLiveness: true
8machineFunctionInfo:
9  isEntryFunction: true
10body: |
11  bb.0:
12    liveins: $vgpr0
13...
14
15---
16# CHECK-LABEL: name: t2
17# CHECK: liveins: $sgpr2_sgpr3
18# CHECK: $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM $sgpr2_sgpr3, 0, 0 :: (load (s64), addrspace 4)
19name: t2
20tracksRegLiveness: true
21machineFunctionInfo:
22  isEntryFunction: true
23body: |
24  bb.0:
25    liveins: $sgpr2_sgpr3
26     $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM $sgpr2_sgpr3, 0, 0 :: (load (s64), addrspace 4)
27...
28
29---
30# CHECK-LABEL: name: t3
31# CHECK:  liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr0_sgpr1_sgpr2_sgpr3
32# CHECK:  $vgpr2 = BUFFER_ATOMIC_ADD_ADDR64_RTN $vgpr2, $vgpr0_vgpr1, killed renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 1, implicit $exec :: (load store (s32), addrspace 1)
33name: t3
34tracksRegLiveness: true
35machineFunctionInfo:
36  isEntryFunction: true
37body: |
38  bb.0:
39    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $sgpr0_sgpr1_sgpr2_sgpr3
40    $vgpr2 = BUFFER_ATOMIC_ADD_ADDR64_RTN $vgpr2, $vgpr0_vgpr1, killed renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 1, implicit $exec :: (load store (s32), addrspace 1)
41...
42