xref: /llvm-project/llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir (revision a74659445dc33a495345c2418e8d01811a1627c7)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcezero=1 %s -o - | FileCheck %s
3
4---
5name: waitcnt-debug-non-first-terminators
6liveins:
7machineFunctionInfo:
8  isEntryFunction: true
9body:             |
10  ; CHECK-LABEL: name: waitcnt-debug-non-first-terminators
11  ; CHECK: bb.0:
12  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
13  ; CHECK-NEXT: {{  $}}
14  ; CHECK-NEXT:   S_CBRANCH_SCC1 %bb.1, implicit $scc
15  ; CHECK-NEXT:   S_BRANCH %bb.2, implicit $scc
16  ; CHECK-NEXT: {{  $}}
17  ; CHECK-NEXT: bb.1:
18  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
19  ; CHECK-NEXT: {{  $}}
20  ; CHECK-NEXT:   S_WAITCNT 0
21  ; CHECK-NEXT:   S_NOP 0
22  ; CHECK-NEXT: {{  $}}
23  ; CHECK-NEXT: bb.2:
24  ; CHECK-NEXT:   S_WAITCNT 0
25  ; CHECK-NEXT:   S_NOP 0
26  bb.0:
27    S_CBRANCH_SCC1 %bb.1, implicit $scc
28    S_BRANCH %bb.2, implicit $scc
29  bb.1:
30    S_NOP 0
31  bb.2:
32    S_NOP 0
33...
34