xref: /llvm-project/llvm/test/CodeGen/AMDGPU/vopd-src2acc-delay.mir (revision edf2d0a95e9f0bd1befd8ff7686cb0e07af14fc3) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=gcn-create-vopd,amdgpu-insert-delay-alu %s -o - | FileCheck %s
3
4---
5name: vopd_fmac_fmac
6tracksRegLiveness: true
7body: |
8  bb.0:
9    ; CHECK-LABEL: name: vopd_fmac_fmac
10    ; CHECK: $vgpr0 = IMPLICIT_DEF
11    ; CHECK-NEXT: $vgpr1 = IMPLICIT_DEF
12    ; CHECK-NEXT: $vgpr2 = IMPLICIT_DEF
13    ; CHECK-NEXT: $vgpr3 = IMPLICIT_DEF
14    ; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
15    ; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_FMAC_F32_e32_X_FMAC_F32_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
16    ; CHECK-NEXT: S_DELAY_ALU .id0_VALU_DEP_1
17    ; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_FMAC_F32_e32_X_FMAC_F32_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
18    $vgpr0 = IMPLICIT_DEF
19    $vgpr1 = IMPLICIT_DEF
20    $vgpr2 = IMPLICIT_DEF
21    $vgpr3 = IMPLICIT_DEF
22    $vgpr4 = IMPLICIT_DEF
23    $vgpr0 = V_FMAC_F32_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
24    $vgpr1 = V_FMAC_F32_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
25    $vgpr0 = V_FMAC_F32_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
26    $vgpr1 = V_FMAC_F32_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
27...
28---
29name: vopd_dot2c_dot2c
30tracksRegLiveness: true
31body: |
32  bb.0:
33    ; CHECK-LABEL: name: vopd_dot2c_dot2c
34    ; CHECK: $vgpr0 = IMPLICIT_DEF
35    ; CHECK-NEXT: $vgpr1 = IMPLICIT_DEF
36    ; CHECK-NEXT: $vgpr2 = IMPLICIT_DEF
37    ; CHECK-NEXT: $vgpr3 = IMPLICIT_DEF
38    ; CHECK-NEXT: $vgpr4 = IMPLICIT_DEF
39    ; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_DOT2C_F32_F16_e32_X_DOT2C_F32_F16_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
40    ; CHECK-NEXT: S_DELAY_ALU .id0_VALU_DEP_1
41    ; CHECK-NEXT: $vgpr0, $vgpr1 = V_DUAL_DOT2C_F32_F16_e32_X_DOT2C_F32_F16_e32_gfx11 $vgpr2, $vgpr3, $vgpr0, $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
42    $vgpr0 = IMPLICIT_DEF
43    $vgpr1 = IMPLICIT_DEF
44    $vgpr2 = IMPLICIT_DEF
45    $vgpr3 = IMPLICIT_DEF
46    $vgpr4 = IMPLICIT_DEF
47    $vgpr0 = V_DOT2C_F32_F16_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
48    $vgpr1 = V_DOT2C_F32_F16_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
49    $vgpr0 = V_DOT2C_F32_F16_e32 $vgpr2, $vgpr3, $vgpr0, implicit $mode, implicit $exec
50    $vgpr1 = V_DOT2C_F32_F16_e32 $vgpr3, $vgpr4, $vgpr1, implicit $mode, implicit $exec
51...
52