xref: /llvm-project/llvm/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll (revision 262c2c0fd2d148ec36798f42009f6aad4c9123a6)
1; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -passes='amdgpu-promote-alloca,sroa,instcombine' < %s | FileCheck -check-prefix=OPT %s
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3; Should give up promoting alloca to vector with an addrspacecast.
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5; OPT-LABEL: @vector_addrspacecast(
6; OPT: alloca [3 x i32]
7; OPT: store i32 0, ptr addrspace(5) %alloca, align 4
8; OPT: store i32 1, ptr addrspace(5) %a1, align 4
9; OPT: store i32 2, ptr addrspace(5) %a2, align 4
10; OPT: %tmp = getelementptr [3 x i32], ptr addrspace(5) %alloca, i64 0, i64 %index
11; OPT: %ac = addrspacecast ptr addrspace(5) %tmp to ptr
12; OPT: %data = load i32, ptr %ac, align 4
13define amdgpu_kernel void @vector_addrspacecast(ptr addrspace(1) %out, i64 %index) {
14entry:
15  %alloca = alloca [3 x i32], addrspace(5)
16  %a1 = getelementptr [3 x i32], ptr addrspace(5) %alloca, i32 0, i32 1
17  %a2 = getelementptr [3 x i32], ptr addrspace(5) %alloca, i32 0, i32 2
18  store i32 0, ptr addrspace(5) %alloca
19  store i32 1, ptr addrspace(5) %a1
20  store i32 2, ptr addrspace(5) %a2
21  %tmp = getelementptr [3 x i32], ptr addrspace(5) %alloca, i64 0, i64 %index
22  %ac = addrspacecast ptr addrspace(5) %tmp to ptr
23  %data = load i32, ptr %ac
24  store i32 %data, ptr addrspace(1) %out
25  ret void
26}
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