xref: /llvm-project/llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir (revision e7900e695e7dfb36be8651d914a31f42a5d6c634) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=greedy -o - -verify-machineinstrs %s | FileCheck -check-prefix=RA %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=greedy,virtregrewriter,post-RA-sched -o - -verify-machineinstrs %s | FileCheck -check-prefix=VR %s
4
5---
6name:            splitkit_copy_bundle
7tracksRegLiveness: true
8machineFunctionInfo:
9  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
10  stackPtrOffsetReg: '$sgpr32'
11body:             |
12  ; RA-LABEL: name: splitkit_copy_bundle
13  ; RA: bb.0:
14  ; RA-NEXT:   successors: %bb.1(0x80000000)
15  ; RA-NEXT: {{  $}}
16  ; RA-NEXT:   [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
17  ; RA-NEXT:   [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
18  ; RA-NEXT:   undef [[S_MOV_B32_:%[0-9]+]].sub1:sgpr_1024 = S_MOV_B32 -1
19  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub0:sgpr_1024 = S_MOV_B32 -1
20  ; RA-NEXT:   undef [[S_MOV_B32_1:%[0-9]+]].sub0:sgpr_1024 = S_MOV_B32 0
21  ; RA-NEXT: {{  $}}
22  ; RA-NEXT: bb.1:
23  ; RA-NEXT:   successors: %bb.2(0x80000000)
24  ; RA-NEXT: {{  $}}
25  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub2:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
26  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub3:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
27  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub4:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
28  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub5:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
29  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub6:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
30  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub7:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
31  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub8:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
32  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub9:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
33  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub10:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
34  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub11:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
35  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub12:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
36  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub13:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
37  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub14:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
38  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub15:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
39  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub16:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
40  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub17:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
41  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub18:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
42  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub19:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
43  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub20:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
44  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub21:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
45  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub22:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
46  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub23:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
47  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub24:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
48  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub25:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
49  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub26:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
50  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub27:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
51  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub28:sgpr_1024 = COPY [[S_MOV_B32_]].sub0
52  ; RA-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub29:sgpr_1024 = COPY [[S_MOV_B32_]].sub1
53  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub1:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
54  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub2:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
55  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub3:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
56  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub4:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
57  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub5:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
58  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub6:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
59  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub7:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
60  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub8:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
61  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub9:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
62  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub10:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
63  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub11:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
64  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub12:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
65  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub13:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
66  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub14:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
67  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub15:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
68  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub16:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
69  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub17:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
70  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub18:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
71  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub19:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
72  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub20:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
73  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub21:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
74  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub22:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
75  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub23:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
76  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub24:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
77  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub25:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
78  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub26:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
79  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub27:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
80  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub28:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
81  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub29:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
82  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub30:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
83  ; RA-NEXT:   [[S_MOV_B32_1:%[0-9]+]].sub31:sgpr_1024 = COPY [[S_MOV_B32_1]].sub0
84  ; RA-NEXT: {{  $}}
85  ; RA-NEXT: bb.2:
86  ; RA-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
87  ; RA-NEXT: {{  $}}
88  ; RA-NEXT:   S_NOP 0, csr_amdgpu, implicit [[DEF]], implicit [[DEF1]]
89  ; RA-NEXT:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
90  ; RA-NEXT:   S_BRANCH %bb.2
91  ;
92  ; VR-LABEL: name: splitkit_copy_bundle
93  ; VR: bb.0:
94  ; VR-NEXT:   successors: %bb.1(0x80000000)
95  ; VR-NEXT: {{  $}}
96  ; VR-NEXT:   renamable $sgpr37 = S_MOV_B32 -1
97  ; VR-NEXT:   renamable $sgpr36 = S_MOV_B32 -1
98  ; VR-NEXT:   renamable $sgpr68 = S_MOV_B32 0
99  ; VR-NEXT:   renamable $sgpr30_sgpr31 = IMPLICIT_DEF
100  ; VR-NEXT:   renamable $sgpr34_sgpr35 = IMPLICIT_DEF
101  ; VR-NEXT: {{  $}}
102  ; VR-NEXT: bb.1:
103  ; VR-NEXT:   successors: %bb.2(0x80000000)
104  ; VR-NEXT:   liveins: $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67:0x000000000000000F, $sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95_sgpr96_sgpr97_sgpr98_sgpr99:0x0000000000000003
105  ; VR-NEXT: {{  $}}
106  ; VR-NEXT:   renamable $sgpr38 = COPY renamable $sgpr36
107  ; VR-NEXT:   renamable $sgpr39 = COPY renamable $sgpr37
108  ; VR-NEXT:   renamable $sgpr40 = COPY renamable $sgpr36
109  ; VR-NEXT:   renamable $sgpr41 = COPY renamable $sgpr37
110  ; VR-NEXT:   renamable $sgpr42 = COPY renamable $sgpr36
111  ; VR-NEXT:   renamable $sgpr43 = COPY renamable $sgpr37
112  ; VR-NEXT:   renamable $sgpr44 = COPY renamable $sgpr36
113  ; VR-NEXT:   renamable $sgpr45 = COPY renamable $sgpr37
114  ; VR-NEXT:   renamable $sgpr46 = COPY renamable $sgpr36
115  ; VR-NEXT:   renamable $sgpr47 = COPY renamable $sgpr37
116  ; VR-NEXT:   renamable $sgpr48 = COPY renamable $sgpr36
117  ; VR-NEXT:   renamable $sgpr49 = COPY renamable $sgpr37
118  ; VR-NEXT:   renamable $sgpr50 = COPY renamable $sgpr36
119  ; VR-NEXT:   renamable $sgpr51 = COPY renamable $sgpr37
120  ; VR-NEXT:   renamable $sgpr52 = COPY renamable $sgpr36
121  ; VR-NEXT:   renamable $sgpr53 = COPY renamable $sgpr37
122  ; VR-NEXT:   renamable $sgpr54 = COPY renamable $sgpr36
123  ; VR-NEXT:   renamable $sgpr55 = COPY renamable $sgpr37
124  ; VR-NEXT:   renamable $sgpr56 = COPY renamable $sgpr36
125  ; VR-NEXT:   renamable $sgpr57 = COPY renamable $sgpr37
126  ; VR-NEXT:   renamable $sgpr58 = COPY renamable $sgpr36
127  ; VR-NEXT:   renamable $sgpr59 = COPY renamable $sgpr37
128  ; VR-NEXT:   renamable $sgpr60 = COPY renamable $sgpr36
129  ; VR-NEXT:   renamable $sgpr61 = COPY renamable $sgpr37
130  ; VR-NEXT:   renamable $sgpr62 = COPY renamable $sgpr36
131  ; VR-NEXT:   renamable $sgpr63 = COPY renamable $sgpr37
132  ; VR-NEXT:   renamable $sgpr64 = COPY renamable $sgpr36
133  ; VR-NEXT:   renamable $sgpr65 = COPY renamable $sgpr37
134  ; VR-NEXT:   renamable $sgpr69 = COPY renamable $sgpr68
135  ; VR-NEXT:   renamable $sgpr70 = COPY renamable $sgpr68
136  ; VR-NEXT:   renamable $sgpr71 = COPY renamable $sgpr68
137  ; VR-NEXT:   renamable $sgpr72 = COPY renamable $sgpr68
138  ; VR-NEXT:   renamable $sgpr73 = COPY renamable $sgpr68
139  ; VR-NEXT:   renamable $sgpr74 = COPY renamable $sgpr68
140  ; VR-NEXT:   renamable $sgpr75 = COPY renamable $sgpr68
141  ; VR-NEXT:   renamable $sgpr76 = COPY renamable $sgpr68
142  ; VR-NEXT:   renamable $sgpr77 = COPY renamable $sgpr68
143  ; VR-NEXT:   renamable $sgpr78 = COPY renamable $sgpr68
144  ; VR-NEXT:   renamable $sgpr79 = COPY renamable $sgpr68
145  ; VR-NEXT:   renamable $sgpr80 = COPY renamable $sgpr68
146  ; VR-NEXT:   renamable $sgpr81 = COPY renamable $sgpr68
147  ; VR-NEXT:   renamable $sgpr82 = COPY renamable $sgpr68
148  ; VR-NEXT:   renamable $sgpr83 = COPY renamable $sgpr68
149  ; VR-NEXT:   renamable $sgpr84 = COPY renamable $sgpr68
150  ; VR-NEXT:   renamable $sgpr85 = COPY renamable $sgpr68
151  ; VR-NEXT:   renamable $sgpr86 = COPY renamable $sgpr68
152  ; VR-NEXT:   renamable $sgpr87 = COPY renamable $sgpr68
153  ; VR-NEXT:   renamable $sgpr88 = COPY renamable $sgpr68
154  ; VR-NEXT:   renamable $sgpr89 = COPY renamable $sgpr68
155  ; VR-NEXT:   renamable $sgpr90 = COPY renamable $sgpr68
156  ; VR-NEXT:   renamable $sgpr91 = COPY renamable $sgpr68
157  ; VR-NEXT:   renamable $sgpr92 = COPY renamable $sgpr68
158  ; VR-NEXT:   renamable $sgpr93 = COPY renamable $sgpr68
159  ; VR-NEXT:   renamable $sgpr94 = COPY renamable $sgpr68
160  ; VR-NEXT:   renamable $sgpr95 = COPY renamable $sgpr68
161  ; VR-NEXT:   renamable $sgpr96 = COPY renamable $sgpr68
162  ; VR-NEXT:   renamable $sgpr97 = COPY renamable $sgpr68
163  ; VR-NEXT:   renamable $sgpr98 = COPY renamable $sgpr68
164  ; VR-NEXT:   renamable $sgpr99 = COPY renamable $sgpr68
165  ; VR-NEXT: {{  $}}
166  ; VR-NEXT: bb.2:
167  ; VR-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
168  ; VR-NEXT:   liveins: $sgpr30_sgpr31, $sgpr34_sgpr35, $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67:0x000000000000000F, $sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95_sgpr96_sgpr97_sgpr98_sgpr99:0x0000000000000003
169  ; VR-NEXT: {{  $}}
170  ; VR-NEXT:   S_NOP 0, csr_amdgpu, implicit renamable $sgpr30_sgpr31, implicit renamable $sgpr34_sgpr35
171  ; VR-NEXT:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
172  ; VR-NEXT:   S_BRANCH %bb.2
173  bb.0:
174    %0:sreg_64 = IMPLICIT_DEF
175    %1:sreg_64 = IMPLICIT_DEF
176    undef %2.sub1:sgpr_1024 = S_MOV_B32 -1
177    %2.sub0:sgpr_1024 = S_MOV_B32 -1
178    undef %3.sub0:sgpr_1024 = S_MOV_B32 0
179
180  bb.1:
181    %2.sub2:sgpr_1024 = COPY %2.sub0
182    %2.sub3:sgpr_1024 = COPY %2.sub1
183    %2.sub4:sgpr_1024 = COPY %2.sub0
184    %2.sub5:sgpr_1024 = COPY %2.sub1
185    %2.sub6:sgpr_1024 = COPY %2.sub0
186    %2.sub7:sgpr_1024 = COPY %2.sub1
187    %2.sub8:sgpr_1024 = COPY %2.sub0
188    %2.sub9:sgpr_1024 = COPY %2.sub1
189    %2.sub10:sgpr_1024 = COPY %2.sub0
190    %2.sub11:sgpr_1024 = COPY %2.sub1
191    %2.sub12:sgpr_1024 = COPY %2.sub0
192    %2.sub13:sgpr_1024 = COPY %2.sub1
193    %2.sub14:sgpr_1024 = COPY %2.sub0
194    %2.sub15:sgpr_1024 = COPY %2.sub1
195    %2.sub16:sgpr_1024 = COPY %2.sub0
196    %2.sub17:sgpr_1024 = COPY %2.sub1
197    %2.sub18:sgpr_1024 = COPY %2.sub0
198    %2.sub19:sgpr_1024 = COPY %2.sub1
199    %2.sub20:sgpr_1024 = COPY %2.sub0
200    %2.sub21:sgpr_1024 = COPY %2.sub1
201    %2.sub22:sgpr_1024 = COPY %2.sub0
202    %2.sub23:sgpr_1024 = COPY %2.sub1
203    %2.sub24:sgpr_1024 = COPY %2.sub0
204    %2.sub25:sgpr_1024 = COPY %2.sub1
205    %2.sub26:sgpr_1024 = COPY %2.sub0
206    %2.sub27:sgpr_1024 = COPY %2.sub1
207    %2.sub28:sgpr_1024 = COPY %2.sub0
208    %2.sub29:sgpr_1024 = COPY %2.sub1
209    %3.sub1:sgpr_1024 = COPY %3.sub0
210    %3.sub2:sgpr_1024 = COPY %3.sub0
211    %3.sub3:sgpr_1024 = COPY %3.sub0
212    %3.sub4:sgpr_1024 = COPY %3.sub0
213    %3.sub5:sgpr_1024 = COPY %3.sub0
214    %3.sub6:sgpr_1024 = COPY %3.sub0
215    %3.sub7:sgpr_1024 = COPY %3.sub0
216    %3.sub8:sgpr_1024 = COPY %3.sub0
217    %3.sub9:sgpr_1024 = COPY %3.sub0
218    %3.sub10:sgpr_1024 = COPY %3.sub0
219    %3.sub11:sgpr_1024 = COPY %3.sub0
220    %3.sub12:sgpr_1024 = COPY %3.sub0
221    %3.sub13:sgpr_1024 = COPY %3.sub0
222    %3.sub14:sgpr_1024 = COPY %3.sub0
223    %3.sub15:sgpr_1024 = COPY %3.sub0
224    %3.sub16:sgpr_1024 = COPY %3.sub0
225    %3.sub17:sgpr_1024 = COPY %3.sub0
226    %3.sub18:sgpr_1024 = COPY %3.sub0
227    %3.sub19:sgpr_1024 = COPY %3.sub0
228    %3.sub20:sgpr_1024 = COPY %3.sub0
229    %3.sub21:sgpr_1024 = COPY %3.sub0
230    %3.sub22:sgpr_1024 = COPY %3.sub0
231    %3.sub23:sgpr_1024 = COPY %3.sub0
232    %3.sub24:sgpr_1024 = COPY %3.sub0
233    %3.sub25:sgpr_1024 = COPY %3.sub0
234    %3.sub26:sgpr_1024 = COPY %3.sub0
235    %3.sub27:sgpr_1024 = COPY %3.sub0
236    %3.sub28:sgpr_1024 = COPY %3.sub0
237    %3.sub29:sgpr_1024 = COPY %3.sub0
238    %3.sub30:sgpr_1024 = COPY %3.sub0
239    %3.sub31:sgpr_1024 = COPY %3.sub0
240
241  bb.2:
242    S_NOP 0, implicit %0, implicit %1, csr_amdgpu
243    S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
244    S_BRANCH %bb.2
245
246...
247
248---
249name:            splitkit_copy_unbundle_reorder
250tracksRegLiveness: true
251machineFunctionInfo:
252  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
253  stackPtrOffsetReg: '$sgpr32'
254body:             |
255  bb.0:
256    ; RA-LABEL: name: splitkit_copy_unbundle_reorder
257    ; RA: [[DEF:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF
258    ; RA-NEXT: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
259    ; RA-NEXT: [[DEF2:%[0-9]+]]:sgpr_512 = IMPLICIT_DEF
260    ; RA-NEXT: [[DEF2:%[0-9]+]].sub4:sgpr_512 = S_MOV_B32 -1
261    ; RA-NEXT: [[DEF2:%[0-9]+]].sub5:sgpr_512 = S_MOV_B32 -1
262    ; RA-NEXT: [[DEF2:%[0-9]+]].sub10:sgpr_512 = S_MOV_B32 -1
263    ; RA-NEXT: [[DEF2:%[0-9]+]].sub11:sgpr_512 = S_MOV_B32 -1
264    ; RA-NEXT: [[DEF2:%[0-9]+]].sub7:sgpr_512 = S_MOV_B32 -1
265    ; RA-NEXT: [[DEF2:%[0-9]+]].sub8:sgpr_512 = S_MOV_B32 -1
266    ; RA-NEXT: [[DEF2:%[0-9]+]].sub13:sgpr_512 = S_MOV_B32 -1
267    ; RA-NEXT: [[DEF2:%[0-9]+]].sub14:sgpr_512 = S_MOV_B32 -1
268    ; RA-NEXT: undef [[COPY:%[0-9]+]].sub4_sub5:sgpr_512 = COPY [[DEF2]].sub4_sub5 {
269    ; RA-NEXT:   internal [[COPY]].sub10_sub11:sgpr_512 = COPY [[DEF2]].sub10_sub11
270    ; RA-NEXT:   internal [[COPY]].sub7:sgpr_512 = COPY [[DEF2]].sub7
271    ; RA-NEXT:   internal [[COPY]].sub8:sgpr_512 = COPY [[DEF2]].sub8
272    ; RA-NEXT:   internal [[COPY]].sub13:sgpr_512 = COPY [[DEF2]].sub13
273    ; RA-NEXT:   internal [[COPY]].sub14:sgpr_512 = COPY [[DEF2]].sub14
274    ; RA-NEXT: }
275    ; RA-NEXT: undef [[COPY1:%[0-9]+]].sub4_sub5:sgpr_512 = COPY [[COPY]].sub4_sub5 {
276    ; RA-NEXT:   internal [[COPY1]].sub10_sub11:sgpr_512 = COPY [[COPY]].sub10_sub11
277    ; RA-NEXT:   internal [[COPY1]].sub7:sgpr_512 = COPY [[COPY]].sub7
278    ; RA-NEXT:   internal [[COPY1]].sub8:sgpr_512 = COPY [[COPY]].sub8
279    ; RA-NEXT:   internal [[COPY1]].sub13:sgpr_512 = COPY [[COPY]].sub13
280    ; RA-NEXT:   internal [[COPY1]].sub14:sgpr_512 = COPY [[COPY]].sub14
281    ; RA-NEXT: }
282    ; RA-NEXT: SI_SPILL_S512_SAVE [[COPY1]], %stack.0, implicit $exec, implicit $sgpr32 :: (store (s512) into %stack.0, align 4, addrspace 5)
283    ; RA-NEXT: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
284    ; RA-NEXT: [[SI_SPILL_S512_RESTORE:%[0-9]+]]:sgpr_512 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s512) from %stack.0, align 4, addrspace 5)
285    ; RA-NEXT: undef [[COPY2:%[0-9]+]].sub4_sub5:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub4_sub5 {
286    ; RA-NEXT:   internal [[COPY2]].sub10_sub11:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub10_sub11
287    ; RA-NEXT:   internal [[COPY2]].sub7:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub7
288    ; RA-NEXT:   internal [[COPY2]].sub8:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub8
289    ; RA-NEXT:   internal [[COPY2]].sub13:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub13
290    ; RA-NEXT:   internal [[COPY2]].sub14:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub14
291    ; RA-NEXT: }
292    ; RA-NEXT: undef [[COPY3:%[0-9]+]].sub4_sub5:sgpr_512 = COPY [[COPY2]].sub4_sub5 {
293    ; RA-NEXT:   internal [[COPY3]].sub10_sub11:sgpr_512 = COPY [[COPY2]].sub10_sub11
294    ; RA-NEXT:   internal [[COPY3]].sub7:sgpr_512 = COPY [[COPY2]].sub7
295    ; RA-NEXT:   internal [[COPY3]].sub8:sgpr_512 = COPY [[COPY2]].sub8
296    ; RA-NEXT:   internal [[COPY3]].sub13:sgpr_512 = COPY [[COPY2]].sub13
297    ; RA-NEXT:   internal [[COPY3]].sub14:sgpr_512 = COPY [[COPY2]].sub14
298    ; RA-NEXT: }
299    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub4, 0 :: (dereferenceable invariant load (s32))
300    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR1:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub5, 0 :: (dereferenceable invariant load (s32))
301    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR2:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub10, 0 :: (dereferenceable invariant load (s32))
302    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR3:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub11, 0 :: (dereferenceable invariant load (s32))
303    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR4:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub7, 0 :: (dereferenceable invariant load (s32))
304    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR5:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub8, 0 :: (dereferenceable invariant load (s32))
305    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR6:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub13, 0 :: (dereferenceable invariant load (s32))
306    ; RA-NEXT: [[S_BUFFER_LOAD_DWORD_SGPR7:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], [[COPY3]].sub14, 0 :: (dereferenceable invariant load (s32))
307    ; RA-NEXT: S_NOP 0, implicit [[DEF]], implicit [[DEF1]], implicit [[S_BUFFER_LOAD_DWORD_SGPR]], implicit [[S_BUFFER_LOAD_DWORD_SGPR1]], implicit [[S_BUFFER_LOAD_DWORD_SGPR2]], implicit [[S_BUFFER_LOAD_DWORD_SGPR3]], implicit [[S_BUFFER_LOAD_DWORD_SGPR4]], implicit [[S_BUFFER_LOAD_DWORD_SGPR5]], implicit [[S_BUFFER_LOAD_DWORD_SGPR6]], implicit [[S_BUFFER_LOAD_DWORD_SGPR7]]
308    ;
309    ; VR-LABEL: name: splitkit_copy_unbundle_reorder
310    ; VR: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = IMPLICIT_DEF
311    ; VR-NEXT: renamable $sgpr16 = S_MOV_B32 -1
312    ; VR-NEXT: renamable $sgpr17 = S_MOV_B32 -1
313    ; VR-NEXT: renamable $sgpr22 = S_MOV_B32 -1
314    ; VR-NEXT: renamable $sgpr23 = S_MOV_B32 -1
315    ; VR-NEXT: renamable $sgpr19 = S_MOV_B32 -1
316    ; VR-NEXT: renamable $sgpr20 = S_MOV_B32 -1
317    ; VR-NEXT: renamable $sgpr25 = S_MOV_B32 -1
318    ; VR-NEXT: renamable $sgpr26 = S_MOV_B32 -1
319    ; VR-NEXT: SI_SPILL_S512_SAVE killed renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s512) into %stack.0, align 4, addrspace 5)
320    ; VR-NEXT: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
321    ; VR-NEXT: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s512) from %stack.0, align 4, addrspace 5)
322    ; VR-NEXT: renamable $sgpr12_sgpr13 = COPY killed renamable $sgpr16_sgpr17
323    ; VR-NEXT: renamable $sgpr15 = COPY killed renamable $sgpr19
324    ; VR-NEXT: renamable $sgpr18_sgpr19 = COPY killed renamable $sgpr22_sgpr23
325    ; VR-NEXT: renamable $sgpr16 = COPY killed renamable $sgpr20
326    ; VR-NEXT: renamable $sgpr21 = COPY killed renamable $sgpr25
327    ; VR-NEXT: renamable $sgpr22 = COPY killed renamable $sgpr26
328    ; VR-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7 = IMPLICIT_DEF
329    ; VR-NEXT: renamable $sgpr8 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr12, 0 :: (dereferenceable invariant load (s32))
330    ; VR-NEXT: renamable $sgpr9 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr13, 0 :: (dereferenceable invariant load (s32))
331    ; VR-NEXT: renamable $sgpr14 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr15, 0 :: (dereferenceable invariant load (s32))
332    ; VR-NEXT: renamable $sgpr10_sgpr11 = IMPLICIT_DEF
333    ; VR-NEXT: renamable $sgpr17 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr22, 0 :: (dereferenceable invariant load (s32))
334    ; VR-NEXT: renamable $sgpr15 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr16, 0 :: (dereferenceable invariant load (s32))
335    ; VR-NEXT: renamable $sgpr12 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr18, 0 :: (dereferenceable invariant load (s32))
336    ; VR-NEXT: renamable $sgpr13 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr19, 0 :: (dereferenceable invariant load (s32))
337    ; VR-NEXT: renamable $sgpr16 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr21, 0 :: (dereferenceable invariant load (s32))
338    ; VR-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7, implicit killed renamable $sgpr10_sgpr11, implicit killed renamable $sgpr8, implicit killed renamable $sgpr9, implicit killed renamable $sgpr12, implicit killed renamable $sgpr13, implicit killed renamable $sgpr14, implicit killed renamable $sgpr15, implicit killed renamable $sgpr16, implicit killed renamable $sgpr17
339    %0:sgpr_128 = IMPLICIT_DEF
340    %1:sreg_64 = IMPLICIT_DEF
341    %2:sgpr_512 = IMPLICIT_DEF
342
343    %2.sub4:sgpr_512 = S_MOV_B32 -1
344    %2.sub5:sgpr_512 = S_MOV_B32 -1
345    %2.sub10:sgpr_512 = S_MOV_B32 -1
346    %2.sub11:sgpr_512 = S_MOV_B32 -1
347    %2.sub7:sgpr_512 = S_MOV_B32 -1
348    %2.sub8:sgpr_512 = S_MOV_B32 -1
349    %2.sub13:sgpr_512 = S_MOV_B32 -1
350    %2.sub14:sgpr_512 = S_MOV_B32 -1
351
352    S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
353
354    %5:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub4:sgpr_512, 0 :: (dereferenceable invariant load (s32))
355    %6:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub5:sgpr_512, 0 :: (dereferenceable invariant load (s32))
356    %7:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub10:sgpr_512, 0 :: (dereferenceable invariant load (s32))
357    %8:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub11:sgpr_512, 0 :: (dereferenceable invariant load (s32))
358    %9:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub7:sgpr_512, 0 :: (dereferenceable invariant load (s32))
359    %10:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub8:sgpr_512, 0 :: (dereferenceable invariant load (s32))
360    %11:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub13:sgpr_512, 0 :: (dereferenceable invariant load (s32))
361    %12:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub14:sgpr_512, 0 :: (dereferenceable invariant load (s32))
362
363    S_NOP 0, implicit %0, implicit %1, implicit %5, implicit %6, implicit %7, implicit %8, implicit %9, implicit %10, implicit %11, implicit %12
364
365...
366