1; RUN: llc -mtriple=amdgcn -mcpu=hawaii -enable-amdgpu-aa=0 -verify-machineinstrs -mattr=-promote-alloca,-load-store-opt,-enable-ds128 < %s | FileCheck -check-prefix=GCN %s 2 3@sPrivateStorage = internal addrspace(3) global [256 x [8 x <4 x i64>]] undef 4 5; GCN-LABEL: {{^}}ds_reorder_vector_split: 6 7; Write zeroinitializer 8; GCN-DAG: ds_write_b64 [[PTR:v[0-9]+]], [[VAL:v\[[0-9]+:[0-9]+\]]] offset:24 9; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]] offset:16 10; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]] offset:8 11; GCN-DAG: ds_write_b64 [[PTR]], [[VAL]]{{$}} 12 13; GCN: s_waitcnt vmcnt 14 15; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:24 16; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:16 17; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:8 18; Appears to be dead store of vector component. 19; GCN-DAG: ds_write_b64 v{{[0-9]+}}, {{v\[[0-9]+:[0-9]+\]$}} 20 21 22; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:8 23; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:16 24; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset:24 25 26; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 27; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8 28; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16 29; GCN-DAG: buffer_store_dwordx2 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:24 30 31; GCN: s_endpgm 32define amdgpu_kernel void @ds_reorder_vector_split(ptr addrspace(1) nocapture readonly %srcValues, ptr addrspace(1) nocapture readonly %offsets, ptr addrspace(1) nocapture %destBuffer, i32 %alignmentOffset, i32 %tmp, i32 %tmp1, i32 %x.i.12.i) #0 { 33entry: 34 %tmp2 = tail call i32 @llvm.amdgcn.workitem.id.x() 35 %tmp3 = tail call i32 @llvm.amdgcn.workitem.id.y() 36 %tmp4 = tail call i32 @llvm.amdgcn.workitem.id.z() 37 %tmp6 = mul i32 %tmp2, %tmp 38 %tmp10 = add i32 %tmp3, %tmp6 39 %tmp11 = mul i32 %tmp10, %tmp1 40 %tmp9 = add i32 %tmp11, %tmp4 41 %x.i.i = tail call i32 @llvm.amdgcn.workgroup.id.x() #1 42 %mul.26.i = mul i32 %x.i.12.i, %x.i.i 43 %add.i = add i32 %tmp2, %mul.26.i 44 %arrayidx = getelementptr [256 x [8 x <4 x i64>]], ptr addrspace(3) @sPrivateStorage, i32 0, i32 %tmp9, i32 %add.i 45 store <4 x i64> zeroinitializer, ptr addrspace(3) %arrayidx 46 %tmp12 = sext i32 %add.i to i64 47 %arrayidx1 = getelementptr inbounds <4 x i64>, ptr addrspace(1) %srcValues, i64 %tmp12 48 %tmp13 = load <4 x i64>, ptr addrspace(1) %arrayidx1 49 %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %offsets, i64 %tmp12 50 %tmp14 = load i32, ptr addrspace(1) %arrayidx2 51 %add.ptr = getelementptr [256 x [8 x <4 x i64>]], ptr addrspace(3) @sPrivateStorage, i32 0, i32 %tmp9, i32 0, i32 %alignmentOffset 52 %mul.i = shl i32 %tmp14, 2 53 %arrayidx.i = getelementptr inbounds i64, ptr addrspace(3) %add.ptr, i32 %mul.i 54 store <4 x i64> %tmp13, ptr addrspace(3) %arrayidx.i 55 %add.ptr6 = getelementptr [256 x [8 x <4 x i64>]], ptr addrspace(3) @sPrivateStorage, i32 0, i32 %tmp9, i32 %tmp14, i32 %alignmentOffset 56 %tmp16 = sext i32 %tmp14 to i64 57 %tmp17 = sext i32 %alignmentOffset to i64 58 %add.ptr9 = getelementptr inbounds <4 x i64>, ptr addrspace(1) %destBuffer, i64 %tmp16, i64 %tmp17 59 %tmp18 = bitcast <4 x i64> %tmp13 to i256 60 %trunc = trunc i256 %tmp18 to i64 61 store i64 %trunc, ptr addrspace(1) %add.ptr9 62 %arrayidx10.1 = getelementptr inbounds i64, ptr addrspace(3) %add.ptr6, i32 1 63 %tmp19 = load i64, ptr addrspace(3) %arrayidx10.1 64 %arrayidx11.1 = getelementptr inbounds i64, ptr addrspace(1) %add.ptr9, i64 1 65 store i64 %tmp19, ptr addrspace(1) %arrayidx11.1 66 %arrayidx10.2 = getelementptr inbounds i64, ptr addrspace(3) %add.ptr6, i32 2 67 %tmp20 = load i64, ptr addrspace(3) %arrayidx10.2 68 %arrayidx11.2 = getelementptr inbounds i64, ptr addrspace(1) %add.ptr9, i64 2 69 store i64 %tmp20, ptr addrspace(1) %arrayidx11.2 70 %arrayidx10.3 = getelementptr inbounds i64, ptr addrspace(3) %add.ptr6, i32 3 71 %tmp21 = load i64, ptr addrspace(3) %arrayidx10.3 72 %arrayidx11.3 = getelementptr inbounds i64, ptr addrspace(1) %add.ptr9, i64 3 73 store i64 %tmp21, ptr addrspace(1) %arrayidx11.3 74 ret void 75} 76 77declare i32 @llvm.amdgcn.workgroup.id.x() #1 78declare i32 @llvm.amdgcn.workitem.id.x() #1 79declare i32 @llvm.amdgcn.workitem.id.y() #1 80declare i32 @llvm.amdgcn.workitem.id.z() #1 81 82attributes #0 = { norecurse nounwind } 83attributes #1 = { nounwind readnone } 84