1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s 3 4--- 5name: fold_reg_kill 6tracksRegLiveness: true 7body: | 8 bb.0: 9 liveins: $sgpr0 10 11 ; GCN-LABEL: name: fold_reg_kill 12 ; GCN: liveins: $sgpr0 13 ; GCN-NEXT: {{ $}} 14 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 15 ; GCN-NEXT: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY]], implicit-def $scc 16 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]] 17 ; GCN-NEXT: S_ENDPGM 0, implicit [[S_ADD_U32_]], implicit [[COPY1]] 18 %0:sreg_32 = COPY $sgpr0 19 %1:sreg_32 = COPY %0 20 %2:sreg_32 = S_ADD_U32 killed %0, killed %0, implicit-def $scc 21 %3:sreg_32 = COPY %1 22 S_ENDPGM 0, implicit %2, implicit %3 23... 24 25--- 26name: fold_subreg_kill 27tracksRegLiveness: true 28body: | 29 ; GCN-LABEL: name: fold_subreg_kill 30 ; GCN: bb.0: 31 ; GCN-NEXT: successors: %bb.1(0x80000000) 32 ; GCN-NEXT: liveins: $sgpr0_sgpr1 33 ; GCN-NEXT: {{ $}} 34 ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr0_sgpr1 35 ; GCN-NEXT: [[S_LOAD_DWORDX4_IMM:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM [[COPY]](p4), 9, 0 :: (load (s128), align 4, addrspace 4) 36 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[S_LOAD_DWORDX4_IMM]].sub2_sub3 37 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY [[S_LOAD_DWORDX4_IMM]].sub0_sub1 38 ; GCN-NEXT: {{ $}} 39 ; GCN-NEXT: bb.1: 40 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY2]].sub1 41 ; GCN-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY2]].sub0 42 ; GCN-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY [[COPY1]].sub1 43 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 -1 44 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY3]], %subreg.sub0, killed [[COPY4]], %subreg.sub1, killed [[COPY5]], %subreg.sub2, killed [[S_MOV_B32_]], %subreg.sub3 45 ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF 46 ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET [[DEF]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec :: (store (s32), addrspace 1) 47 bb.0: 48 liveins: $sgpr0_sgpr1 49 50 %0:sgpr_64(p4) = COPY $sgpr0_sgpr1 51 %1:sgpr_128 = S_LOAD_DWORDX4_IMM %0:sgpr_64(p4), 9, 0 :: (load (s128), align 4, addrspace 4) 52 %2:sreg_64_xexec = COPY %1.sub0_sub1:sgpr_128 53 %3:sreg_64_xexec = COPY killed %1.sub2_sub3:sgpr_128 54 %4:sreg_64 = COPY %2:sreg_64_xexec 55 %5:sreg_32 = COPY %3.sub1:sreg_64_xexec 56 57 bb.1: 58 %6:sreg_32 = COPY %4.sub1:sreg_64 59 %7:sreg_32 = COPY %4.sub0:sreg_64 60 %8:sreg_32 = COPY %5:sreg_32 61 %9:sreg_32 = S_MOV_B32 -1 62 %10:sgpr_128 = REG_SEQUENCE killed %6:sreg_32, %subreg.sub0, killed %7:sreg_32, %subreg.sub1, killed %8:sreg_32, %subreg.sub2, killed %9:sreg_32, %subreg.sub3 63 %11:vgpr_32 = IMPLICIT_DEF 64 BUFFER_STORE_DWORD_OFFSET %11:vgpr_32, killed %10:sgpr_128, 0, 0, 0, 0, implicit $exec :: (store (s32), addrspace 1) 65... 66 67