1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 3; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 4 5 6; FUNC-LABEL: {{^}}test_a: 7; EG-NOT: CND 8; EG: SET{{[NEQGTL]+}}_DX10 9 10define amdgpu_kernel void @test_a(ptr addrspace(1) %out, float %in) { 11entry: 12 %0 = fcmp olt float %in, 0.000000e+00 13 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 14 %2 = fneg float %1 15 %3 = fptosi float %2 to i32 16 %4 = bitcast i32 %3 to float 17 %5 = bitcast float %4 to i32 18 %6 = icmp ne i32 %5, 0 19 br i1 %6, label %IF, label %ENDIF 20 21IF: 22 %7 = getelementptr i32, ptr addrspace(1) %out, i32 1 23 store i32 0, ptr addrspace(1) %7 24 br label %ENDIF 25 26ENDIF: 27 store i32 0, ptr addrspace(1) %out 28 ret void 29} 30 31; Same as test_a, but the branch labels are swapped to produce the inverse cc 32; for the icmp instruction 33 34; EG-LABEL: {{^}}test_b: 35; EG: SET{{[GTEQN]+}}_DX10 36; EG-NEXT: 0(0.000000e+00), 0(0.000000e+00) 37; EG-NEXT: PRED_ 38; EG-NEXT: ALU clause starting 39define amdgpu_kernel void @test_b(ptr addrspace(1) %out, float %in) { 40entry: 41 %0 = fcmp olt float %in, 0.0 42 %1 = select i1 %0, float 1.000000e+00, float 0.000000e+00 43 %2 = fneg float %1 44 %3 = fptosi float %2 to i32 45 %4 = bitcast i32 %3 to float 46 %5 = bitcast float %4 to i32 47 %6 = icmp ne i32 %5, 0 48 br i1 %6, label %ENDIF, label %IF 49 50IF: 51 %7 = getelementptr i32, ptr addrspace(1) %out, i32 1 52 store i32 0, ptr addrspace(1) %7 53 br label %ENDIF 54 55ENDIF: 56 store i32 0, ptr addrspace(1) %out 57 ret void 58} 59 60; Test a CND*_INT instruction with float true/false values 61; EG-LABEL: {{^}}test_c: 62; EG: CND{{[GTE]+}}_INT 63define amdgpu_kernel void @test_c(ptr addrspace(1) %out, i32 %in) { 64entry: 65 %0 = icmp sgt i32 %in, 0 66 %1 = select i1 %0, float 2.0, float 3.0 67 store float %1, ptr addrspace(1) %out 68 ret void 69} 70 71; FUNC-LABEL: {{^}}selectcc_bool: 72; SI: s_cmp_lg_u32 73; SI: v_cndmask_b32_e64 74; SI-NOT: cmp 75; SI-NOT: cndmask 76define amdgpu_kernel void @selectcc_bool(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind { 77 %icmp0 = icmp ne i32 %a, %b 78 %ext = select i1 %icmp0, i32 -1, i32 0 79 store i32 %ext, ptr addrspace(1) %out 80 ret void 81} 82