xref: /llvm-project/llvm/test/CodeGen/AMDGPU/select-i1.ll (revision 758444ca3e7163a1504eeced3383af861d01d761)
1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
3
4; FIXME: This should go in existing select.ll test, except the current testcase there is broken on GCN
5
6; GCN-LABEL: {{^}}select_i1:
7; GCN: s_cselect_b32
8; GCN-NOT: v_cndmask_b32
9define amdgpu_kernel void @select_i1(ptr addrspace(1) %out, i32 %cond, i1 %a, i1 %b) nounwind {
10  %cmp = icmp ugt i32 %cond, 5
11  %sel = select i1 %cmp, i1 %a, i1 %b
12  store i1 %sel, ptr addrspace(1) %out, align 4
13  ret void
14}
15
16; GCN-LABEL: {{^}}s_minmax_i1:
17; GCN: s_load_dword [[LOAD:s[0-9]+]],
18; GCN: s_bitcmp1_b32 [[LOAD]], 0
19; GCN: s_cselect_b32 [[SHIFTVAL:s[0-9]+]], 8, 16
20; GCN: s_lshr_b32 [[LOAD]], [[LOAD]], [[SHIFTVAL]]
21; GCN: s_and_b32  [[LOAD]], [[LOAD]], 1
22define amdgpu_kernel void @s_minmax_i1(ptr addrspace(1) %out, [8 x i32], i1 zeroext %cond, i1 zeroext %a, i1 zeroext %b) nounwind {
23  %cmp = icmp slt i1 %cond, false
24  %sel = select i1 %cmp, i1 %a, i1 %b
25  store i1 %sel, ptr addrspace(1) %out, align 4
26  ret void
27}
28