1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3; -------------------------------------------------------------------------------- 4; Don't fold if fneg can fold into the source 5; -------------------------------------------------------------------------------- 6 7; GCN-LABEL: {{^}}select_fneg_posk_src_rcp_legacy_f32: 8; GCN: buffer_load_dword [[X:v[0-9]+]] 9 10; GCN: v_rcp_legacy_f32_e64 [[RCP:v[0-9]+]], -[[X]] 11; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[RCP]], vcc 12; GCN-NEXT: buffer_store_dword [[SELECT]] 13define amdgpu_kernel void @select_fneg_posk_src_rcp_legacy_f32(i32 %c) #2 { 14 %x = load volatile float, ptr addrspace(1) undef 15 %y = load volatile float, ptr addrspace(1) undef 16 %cmp = icmp eq i32 %c, 0 17 %rcp = call float @llvm.amdgcn.rcp.legacy(float %x) 18 %fneg = fsub float -0.0, %rcp 19 %select = select i1 %cmp, float %fneg, float 2.0 20 store volatile float %select, ptr addrspace(1) undef 21 ret void 22} 23 24; GCN-LABEL: {{^}}select_fneg_posk_src_mul_legacy_f32: 25; GCN: buffer_load_dword [[X:v[0-9]+]] 26 27; GCN: v_mul_legacy_f32_e32 [[MUL:v[0-9]+]], -4.0, [[X]] 28; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[MUL]], vcc 29; GCN-NEXT: buffer_store_dword [[SELECT]] 30define amdgpu_kernel void @select_fneg_posk_src_mul_legacy_f32(i32 %c) #2 { 31 %x = load volatile float, ptr addrspace(1) undef 32 %cmp = icmp eq i32 %c, 0 33 %mul = call float @llvm.amdgcn.fmul.legacy(float %x, float 4.0) 34 %fneg = fsub float -0.0, %mul 35 %select = select i1 %cmp, float %fneg, float 2.0 36 store volatile float %select, ptr addrspace(1) undef 37 ret void 38} 39 40declare float @llvm.amdgcn.rcp.legacy(float) #1 41declare float @llvm.amdgcn.fmul.legacy(float, float) #1 42 43attributes #0 = { nounwind } 44attributes #1 = { nounwind readnone } 45