1# RUN: llc -mtriple=amdgcn -mcpu=kaveri -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 2# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 3# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -o - %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s 4# RUN: llc -mtriple=amdgcn -mcpu=kaveri -passes=si-peephole-sdwa -o - %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 5# RUN: llc -mtriple=amdgcn -mcpu=fiji -passes=si-peephole-sdwa -o - %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 6# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -passes=si-peephole-sdwa -o - %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s 7 8# GCN-LABEL: {{^}}name: add_shr_i32 9# GCN: [[SMOV:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 123 10 11# CI: [[SHIFT:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, %{{[0-9]+}}, implicit $exec 12# CI: %{{[0-9]+}}:vgpr_32 = V_ADD_CO_U32_e32 [[SMOV]], killed [[SHIFT]], implicit-def $vcc, implicit $exec 13 14# VI: [[VMOV:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 [[SMOV]], implicit $exec 15# VI: %{{[0-9]+}}:vgpr_32 = V_ADD_CO_U32_sdwa 0, [[VMOV]], 0, %{{[0-9]+}}, 0, 6, 0, 6, 5, implicit-def $vcc, implicit $exec 16 17# GFX9: %{{[0-9]+}}:vgpr_32 = V_ADD_CO_U32_sdwa 0, [[SMOV]], 0, %{{[0-9]+}}, 0, 6, 0, 6, 5, implicit-def $vcc, implicit $exec 18 19--- 20name: add_shr_i32 21tracksRegLiveness: true 22registers: 23 - { id: 0, class: vreg_64 } 24 - { id: 1, class: vreg_64 } 25 - { id: 2, class: sreg_64 } 26 - { id: 3, class: vgpr_32 } 27 - { id: 4, class: sreg_32_xm0 } 28 - { id: 5, class: sreg_32_xm0 } 29 - { id: 6, class: sreg_32 } 30 - { id: 7, class: sreg_32_xm0 } 31 - { id: 8, class: sreg_32 } 32 - { id: 9, class: vgpr_32 } 33 - { id: 10, class: vgpr_32 } 34 - { id: 11, class: vgpr_32 } 35 - { id: 12, class: sreg_32_xm0 } 36body: | 37 bb.0: 38 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr30_sgpr31 39 40 %2 = COPY $sgpr30_sgpr31 41 %1 = COPY $vgpr2_vgpr3 42 %0 = COPY $vgpr0_vgpr1 43 %3 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32)) 44 %12 = S_MOV_B32 123 45 %10 = V_LSHRREV_B32_e64 16, %3, implicit $exec 46 %11 = V_ADD_CO_U32_e32 %12, killed %10, implicit-def $vcc, implicit $exec 47 FLAT_STORE_DWORD %0, %11, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32)) 48 $sgpr30_sgpr31 = COPY %2 49 S_SETPC_B64_return $sgpr30_sgpr31 50 51... 52 53# GCN-LABEL: {{^}}name: trunc_shr_f32 54 55# CI: [[SHIFT:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, %{{[0-9]+}}, implicit $exec 56# CI: %{{[0-9]+}}:vgpr_32 = V_TRUNC_F32_e64 0, killed [[SHIFT]], 1, 2, implicit $mode, implicit $exec, implicit-def $vcc 57 58# VI: [[SHIFT:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, %{{[0-9]+}}, implicit $exec 59# VI: %{{[0-9]+}}:vgpr_32 = V_TRUNC_F32_e64 0, killed [[SHIFT]], 1, 2, implicit $mode, implicit $exec, implicit-def $vcc 60 61# GFX9: %{{[0-9]+}}:vgpr_32 = V_TRUNC_F32_sdwa 0, %{{[0-9]+}}, 1, 2, 6, 0, 5, implicit $mode, implicit $exec 62 63--- 64name: trunc_shr_f32 65tracksRegLiveness: true 66registers: 67 - { id: 0, class: vreg_64 } 68 - { id: 1, class: vreg_64 } 69 - { id: 2, class: sreg_64 } 70 - { id: 3, class: vgpr_32 } 71 - { id: 4, class: sreg_32_xm0 } 72 - { id: 5, class: sreg_32_xm0 } 73 - { id: 6, class: sreg_32 } 74 - { id: 7, class: sreg_32_xm0 } 75 - { id: 8, class: sreg_32 } 76 - { id: 9, class: vgpr_32 } 77 - { id: 10, class: vgpr_32 } 78 - { id: 11, class: vgpr_32 } 79body: | 80 bb.0: 81 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr30_sgpr31 82 83 %2 = COPY $sgpr30_sgpr31 84 %1 = COPY $vgpr2_vgpr3 85 %0 = COPY $vgpr0_vgpr1 86 %3 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32)) 87 %10 = V_LSHRREV_B32_e64 16, %3, implicit $exec 88 %11 = V_TRUNC_F32_e64 0, killed %10, 1, 2, implicit $mode, implicit $exec, implicit-def $vcc 89 FLAT_STORE_DWORD %0, %11, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32)) 90 $sgpr30_sgpr31 = COPY %2 91 S_SETPC_B64_return $sgpr30_sgpr31 92