xref: /llvm-project/llvm/test/CodeGen/AMDGPU/readsteadycounter.ll (revision 11fcae69dbea4860e20ab799ecca9b0432d7f19d)
1; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX700
2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX900
3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX900
4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX1100
5; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,GFX1100
6
7declare i64 @llvm.readsteadycounter() #0
8
9; GCN-LABEL: {{^}}test_readsteadycounter:
10; GFX700: s_mov_b32 s[[REG:[0-9]+]], 0
11; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
12; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]
13; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)
14; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)
15define amdgpu_kernel void @test_readsteadycounter(ptr addrspace(1) %out) #0 {
16  %cycle0 = call i64 @llvm.readsteadycounter()
17  store volatile i64 %cycle0, ptr addrspace(1) %out
18
19  %cycle1 = call i64 @llvm.readsteadycounter()
20  store volatile i64 %cycle1, ptr addrspace(1) %out
21  ret void
22}
23
24attributes #0 = { nounwind }
25