1; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s 2; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s 3 4declare i32 @llvm.read_register.i32(metadata) #0 5declare i64 @llvm.read_register.i64(metadata) #0 6 7; CHECK-LABEL: {{^}}test_read_m0: 8; CHECK: s_mov_b32 m0, -1 9; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], m0 10; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]] 11define amdgpu_kernel void @test_read_m0(ptr addrspace(1) %out) #0 { 12 store volatile i32 0, ptr addrspace(3) undef 13 %m0 = call i32 @llvm.read_register.i32(metadata !0) 14 store i32 %m0, ptr addrspace(1) %out 15 ret void 16} 17 18; CHECK-LABEL: {{^}}test_read_exec: 19; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], exec_lo 20; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], exec_hi 21; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]] 22define amdgpu_kernel void @test_read_exec(ptr addrspace(1) %out) #0 { 23 %exec = call i64 @llvm.read_register.i64(metadata !1) 24 store i64 %exec, ptr addrspace(1) %out 25 ret void 26} 27 28; CHECK-LABEL: {{^}}test_read_flat_scratch: 29; CHECK: v_mov_b32_e32 v[[LO:[0-9]+]], flat_scratch_lo 30; CHECK: v_mov_b32_e32 v[[HI:[0-9]+]], flat_scratch_hi 31; CHECK: flat_store_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[[[LO]]:[[HI]]] 32define amdgpu_kernel void @test_read_flat_scratch(ptr addrspace(1) %out) #0 { 33 %flat_scratch = call i64 @llvm.read_register.i64(metadata !2) 34 store i64 %flat_scratch, ptr addrspace(1) %out 35 ret void 36} 37 38; CHECK-LABEL: {{^}}test_read_flat_scratch_lo: 39; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_lo 40; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]] 41define amdgpu_kernel void @test_read_flat_scratch_lo(ptr addrspace(1) %out) #0 { 42 %flat_scratch_lo = call i32 @llvm.read_register.i32(metadata !3) 43 store i32 %flat_scratch_lo, ptr addrspace(1) %out 44 ret void 45} 46 47; CHECK-LABEL: {{^}}test_read_flat_scratch_hi: 48; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], flat_scratch_hi 49; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]] 50define amdgpu_kernel void @test_read_flat_scratch_hi(ptr addrspace(1) %out) #0 { 51 %flat_scratch_hi = call i32 @llvm.read_register.i32(metadata !4) 52 store i32 %flat_scratch_hi, ptr addrspace(1) %out 53 ret void 54} 55 56; CHECK-LABEL: {{^}}test_read_exec_lo: 57; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_lo 58; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]] 59define amdgpu_kernel void @test_read_exec_lo(ptr addrspace(1) %out) #0 { 60 %exec_lo = call i32 @llvm.read_register.i32(metadata !5) 61 store i32 %exec_lo, ptr addrspace(1) %out 62 ret void 63} 64 65; CHECK-LABEL: {{^}}test_read_exec_hi: 66; CHECK: v_mov_b32_e32 [[COPY:v[0-9]+]], exec_hi 67; CHECK: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[COPY]] 68define amdgpu_kernel void @test_read_exec_hi(ptr addrspace(1) %out) #0 { 69 %exec_hi = call i32 @llvm.read_register.i32(metadata !6) 70 store i32 %exec_hi, ptr addrspace(1) %out 71 ret void 72} 73 74attributes #0 = { nounwind } 75 76!0 = !{!"m0"} 77!1 = !{!"exec"} 78!2 = !{!"flat_scratch"} 79!3 = !{!"flat_scratch_lo"} 80!4 = !{!"flat_scratch_hi"} 81!5 = !{!"exec_lo"} 82!6 = !{!"exec_hi"} 83