xref: /llvm-project/llvm/test/CodeGen/AMDGPU/promote-alloca-strip-abi-opt-attributes.ll (revision cc19374afa55b6ccafb07ef0cb6550f4222bf99f)
1; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-promote-alloca -disable-promote-alloca-to-vector < %s | FileCheck %s
2
3; This kernel starts with the amdgpu-no-workitem-id-* attributes, but
4; need to be removed when these intrinsic uses are introduced.
5
6; CHECK-LABEL: define amdgpu_kernel void @promote_to_lds(ptr addrspace(1) %out, i32 %in) #0 {
7; CHECK: call noalias nonnull dereferenceable(64) ptr addrspace(4) @llvm.amdgcn.dispatch.ptr()
8; CHECK: call range(i32 0, 256) i32 @llvm.amdgcn.workitem.id.x()
9; CHECK: call range(i32 0, 256) i32 @llvm.amdgcn.workitem.id.y()
10; CHECK: call range(i32 0, 256) i32 @llvm.amdgcn.workitem.id.z()
11define amdgpu_kernel void @promote_to_lds(ptr addrspace(1) %out, i32 %in) #0 {
12entry:
13  %tmp = alloca [2 x i32], addrspace(5)
14  %tmp2 = getelementptr inbounds [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 1
15  store i32 0, ptr addrspace(5) %tmp
16  store i32 1, ptr addrspace(5) %tmp2
17  %tmp3 = getelementptr inbounds [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 %in
18  %tmp4 = load i32, ptr addrspace(5) %tmp3
19  %tmp5 = load volatile i32, ptr addrspace(1) undef
20  %tmp6 = add i32 %tmp4, %tmp5
21  store i32 %tmp6, ptr addrspace(1) %out
22  ret void
23}
24
25attributes #0 = { "amdgpu-flat-work-group-size"="256,256" "amdgpu-waves-per-eu"="1,5" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-no-dispatch-ptr" }
26
27; CHECK: attributes #0 = { "amdgpu-flat-work-group-size"="256,256" "amdgpu-waves-per-eu"="1,5" }
28