xref: /llvm-project/llvm/test/CodeGen/AMDGPU/promote-alloca-non-constant-index.ll (revision 0e6257fbc2a1e0ccccec6a58d780ef5367047120)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -passes=amdgpu-promote-alloca < %s | FileCheck %s
3
4; Check that promoting an alloca to a vector form works correctly when a variable
5; vector index is used.
6
7define amdgpu_kernel void @non_constant_index(i32 %arg) {
8; CHECK-LABEL: define amdgpu_kernel void @non_constant_index(
9; CHECK-SAME: i32 [[ARG:%.*]]) {
10; CHECK-NEXT:  bb:
11; CHECK-NEXT:    br label [[BB1:%.*]]
12; CHECK:       bb1:
13; CHECK-NEXT:    br label [[BB1]]
14; CHECK:       bb2:
15; CHECK-NEXT:    br label [[BB3:%.*]]
16; CHECK:       bb3:
17; CHECK-NEXT:    [[PROMOTEALLOCA:%.*]] = phi <2 x float> [ [[TMP2:%.*]], [[BB3]] ], [ poison, [[BB2:%.*]] ]
18; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <2 x float> [[PROMOTEALLOCA]], float 0.000000e+00, i32 [[ARG]]
19; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[ARG]], 1
20; CHECK-NEXT:    [[TMP2]] = insertelement <2 x float> [[TMP0]], float 0.000000e+00, i32 [[TMP1]]
21; CHECK-NEXT:    br label [[BB3]]
22;
23bb:
24  %i = alloca [2 x float], align 4, addrspace(5)
25  br label %bb1
26
27bb1:
28  br label %bb1
29
30bb2:
31  br label %bb3
32
33bb3:
34  %i4 = getelementptr float, ptr addrspace(5) %i, i32 %arg
35  store <2 x float> zeroinitializer, ptr addrspace(5) %i4, align 8
36  br label %bb3
37}
38