1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2 3@L = external local_unnamed_addr addrspace(3) global [9 x double], align 16 4@Ldisp = external local_unnamed_addr addrspace(3) global [96 x double], align 16 5 6; Stores are reordered during loads merge. This case used to assert while 7; scanning for a paired instruction because it used to expect paired one 8; to follow a base one. 9 10; GCN-LABEL: {{^}}out_of_order_merge: 11; GCN-COUNT2: ds_read2_b64 12; GCN-COUNT3: ds_write_b64 13define amdgpu_kernel void @out_of_order_merge() { 14entry: 15 %gep2 = getelementptr inbounds [96 x double], ptr addrspace(3) @Ldisp, i32 0, i32 1 16 %tmp12 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 0, i32 1), align 8 17 %tmp14 = extractelement <2 x double> %tmp12, i32 0 18 %tmp15 = extractelement <2 x double> %tmp12, i32 1 19 %add50.i = fadd double %tmp14, %tmp15 20 store double %add50.i, ptr addrspace(3) @Ldisp, align 8 21 %tmp16 = load double, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 1, i32 0), align 8 22 store double %tmp16, ptr addrspace(3) %gep2, align 8 23 %tmp17 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 2, i32 1), align 8 24 %tmp19 = extractelement <2 x double> %tmp17, i32 1 25 store double %tmp19, ptr addrspace(3) undef, align 8 26 ret void 27} 28