xref: /llvm-project/llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass machine-scheduler -amdgpu-disable-unclustered-high-rp-reschedule -verify-machineinstrs %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck -check-prefix=DEBUG %s
2# REQUIRES: asserts
3
4--- |
5  define void @sink_and_inc_idx_when_skipping_small_region_1() "amdgpu-flat-work-group-size"="1,64" {
6    ret void
7  }
8
9  define void @sink_and_inc_idx_when_skipping_small_regions_2() "amdgpu-flat-work-group-size"="1,64" {
10    ret void
11  }
12---
13name:            sink_and_inc_idx_when_skipping_small_region_1
14tracksRegLiveness: true
15machineFunctionInfo:
16  isEntryFunction: true
17body:             |
18  ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_region_1: IsSSA, NoPHIs, TracksLiveness
19  ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing
20  ; DEBUG-NEXT: ********** MI Scheduling **********
21  ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_region_1:%bb.2
22  ; DEBUG-NEXT:   From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0
23  ; DEBUG-NEXT:     To: End RegionInstrs: 2
24  bb.0:
25    successors: %bb.1
26
27    %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0
28    %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
29    %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
30    %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
31    %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0
32    %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0
33    %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0
34    %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0
35    %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0
36    %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0
37    %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0
38    %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0
39    %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0
40    %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0
41    %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0
42    %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0
43    %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0
44    %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0
45    %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0
46    %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0
47    %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0
48    %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0
49    %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0
50
51  bb.1:
52  ; predecessors: %bb.0
53    successors: %bb.2
54
55    %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
56    S_NOP 0
57
58
59  bb.2:
60  ; predecessors: %bb.1
61    successors: %bb.3
62
63    %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0
64    S_NOP 0, implicit %24
65
66  bb.3:
67  ; predcessors: %bb.2
68
69    S_NOP 0, implicit %23
70    S_NOP 0, implicit %0, implicit %1
71    S_NOP 0, implicit %2, implicit %3
72    S_NOP 0, implicit %4, implicit %5
73    S_NOP 0, implicit %6, implicit %7
74    S_NOP 0, implicit %8, implicit %9
75    S_NOP 0, implicit %10, implicit %11
76    S_NOP 0, implicit %12, implicit %13
77    S_NOP 0, implicit %14, implicit %15
78    S_NOP 0, implicit %16, implicit %17
79    S_NOP 0, implicit %18, implicit %19
80    S_NOP 0, implicit %20, implicit %21
81    S_NOP 0, implicit %22
82    S_ENDPGM 0
83...
84---
85name:            sink_and_inc_idx_when_skipping_small_regions_2
86tracksRegLiveness: true
87machineFunctionInfo:
88  isEntryFunction: true
89body:             |
90  ; DEBUG: Machine code for function sink_and_inc_idx_when_skipping_small_regions_2: IsSSA, NoPHIs, TracksLiveness
91  ; DEBUG: Retrying function scheduling with improved occupancy of 10 from rematerializing
92  ; DEBUG-NEXT: ********** MI Scheduling **********
93  ; DEBUG-NEXT: sink_and_inc_idx_when_skipping_small_regions_2:%bb.2
94  ; DEBUG-NEXT:   From: %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0
95  ; DEBUG-NEXT:     To: End RegionInstrs: 4
96  bb.0:
97    successors: %bb.1
98
99    %0:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 0, implicit $exec, implicit $mode, implicit-def $m0
100    %1:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 1, implicit $exec, implicit $mode, implicit-def $m0
101    %2:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 2, implicit $exec, implicit $mode, implicit-def $m0
102    %3:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 3, implicit $exec, implicit $mode, implicit-def $m0
103    %4:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 4, implicit $exec, implicit $mode, implicit-def $m0
104    %5:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 5, implicit $exec, implicit $mode, implicit-def $m0
105    %6:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 6, implicit $exec, implicit $mode, implicit-def $m0
106    %7:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 7, implicit $exec, implicit $mode, implicit-def $m0
107    %8:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 8, implicit $exec, implicit $mode, implicit-def $m0
108    %9:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 9, implicit $exec, implicit $mode, implicit-def $m0
109    %10:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 10, implicit $exec, implicit $mode, implicit-def $m0
110    %11:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 11, implicit $exec, implicit $mode, implicit-def $m0
111    %12:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 12, implicit $exec, implicit $mode, implicit-def $m0
112    %13:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 13, implicit $exec, implicit $mode, implicit-def $m0
113    %14:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 14, implicit $exec, implicit $mode, implicit-def $m0
114    %15:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 15, implicit $exec, implicit $mode, implicit-def $m0
115    %16:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 16, implicit $exec, implicit $mode, implicit-def $m0
116    %17:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 17, implicit $exec, implicit $mode, implicit-def $m0
117    %18:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 18, implicit $exec, implicit $mode, implicit-def $m0
118    %19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0
119    %20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0
120    %21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0
121    %22:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 22, implicit $exec, implicit $mode, implicit-def $m0
122
123  bb.1:
124  ; predecessors: %bb.0
125    successors: %bb.2
126
127    %23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
128    S_NOP 0
129
130
131  bb.2:
132  ; predecessors: %bb.1
133    successors: %bb.3
134
135    %24:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 24, implicit $exec, implicit $mode, implicit-def $m0
136    S_NOP 0, implicit %24
137    S_NOP 0, implicit %23
138
139  bb.3:
140  ; predcessors: %bb.2
141
142    S_NOP 0, implicit %0, implicit %1
143    S_NOP 0, implicit %2, implicit %3
144    S_NOP 0, implicit %4, implicit %5
145    S_NOP 0, implicit %6, implicit %7
146    S_NOP 0, implicit %8, implicit %9
147    S_NOP 0, implicit %10, implicit %11
148    S_NOP 0, implicit %12, implicit %13
149    S_NOP 0, implicit %14, implicit %15
150    S_NOP 0, implicit %16, implicit %17
151    S_NOP 0, implicit %18, implicit %19
152    S_NOP 0, implicit %20, implicit %21
153    S_NOP 0, implicit %22
154    S_ENDPGM 0
155...
156