1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX900 %s 3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX940 %s 4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s 5# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX12 %s 6 7--- 8name: local_stack_alloc__v_add_u32_e32__literal_offsets 9tracksRegLiveness: true 10stack: 11 - { id: 0, size: 4096, alignment: 4 } 12machineFunctionInfo: 13 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 14 frameOffsetReg: '$sgpr33' 15 stackPtrOffsetReg: '$sgpr32' 16body: | 17 bb.0: 18 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets 19 ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256 20 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 21 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 22 ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 23 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 24 ; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, [[V_ADD_U32_e64_]], implicit $exec 25 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 26 ; GFX900-NEXT: SI_RETURN 27 ; 28 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets 29 ; GFX940: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec 30 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 31 ; GFX940-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec 32 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 33 ; GFX940-NEXT: SI_RETURN 34 ; 35 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets 36 ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256 37 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 38 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 39 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 40 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 41 ; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, [[V_ADD_U32_e64_]], implicit $exec 42 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 43 ; GFX10-NEXT: SI_RETURN 44 ; 45 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets 46 ; GFX12: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec 47 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 48 ; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec 49 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 50 ; GFX12-NEXT: SI_RETURN 51 %0:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec 52 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 53 %1:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec 54 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 55 SI_RETURN 56 57... 58 59--- 60name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets 61tracksRegLiveness: true 62stack: 63 - { id: 0, size: 64, alignment: 4 } 64machineFunctionInfo: 65 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 66 frameOffsetReg: '$sgpr33' 67 stackPtrOffsetReg: '$sgpr32' 68body: | 69 bb.0: 70 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets 71 ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 72 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 73 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 74 ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 75 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 76 ; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, [[V_ADD_U32_e64_]], implicit $exec 77 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 78 ; GFX900-NEXT: SI_RETURN 79 ; 80 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets 81 ; GFX940: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec 82 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 83 ; GFX940-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec 84 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 85 ; GFX940-NEXT: SI_RETURN 86 ; 87 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets 88 ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 89 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 90 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 91 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 92 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 93 ; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, [[V_ADD_U32_e64_]], implicit $exec 94 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 95 ; GFX10-NEXT: SI_RETURN 96 ; 97 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets 98 ; GFX12: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec 99 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 100 ; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec 101 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 102 ; GFX12-NEXT: SI_RETURN 103 %0:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec 104 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 105 %1:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec 106 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 107 SI_RETURN 108 109... 110 111--- 112name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets 113tracksRegLiveness: true 114stack: 115 - { id: 0, size: 64, alignment: 4 } 116machineFunctionInfo: 117 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 118 frameOffsetReg: '$sgpr33' 119 stackPtrOffsetReg: '$sgpr32' 120body: | 121 bb.0: 122 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets 123 ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 124 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 125 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 126 ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 127 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 128 ; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec 129 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 130 ; GFX900-NEXT: SI_RETURN 131 ; 132 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets 133 ; GFX940: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec 134 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 135 ; GFX940-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec 136 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 137 ; GFX940-NEXT: SI_RETURN 138 ; 139 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets 140 ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 141 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 142 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 143 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 144 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 145 ; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec 146 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 147 ; GFX10-NEXT: SI_RETURN 148 ; 149 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets 150 ; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec 151 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 152 ; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec 153 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 154 ; GFX12-NEXT: SI_RETURN 155 %0:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec 156 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 157 %1:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec 158 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 159 SI_RETURN 160 161... 162 163--- 164name: local_stack_alloc__v_add_u32_e32__vgpr_offsets 165tracksRegLiveness: true 166stack: 167 - { id: 0, size: 4096, alignment: 4 } 168machineFunctionInfo: 169 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 170 frameOffsetReg: '$sgpr33' 171 stackPtrOffsetReg: '$sgpr32' 172body: | 173 bb.0: 174 liveins: $vgpr0 175 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets 176 ; GFX900: liveins: $vgpr0 177 ; GFX900-NEXT: {{ $}} 178 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 179 ; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 180 ; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 181 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 182 ; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 183 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 184 ; GFX900-NEXT: SI_RETURN 185 ; 186 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets 187 ; GFX940: liveins: $vgpr0 188 ; GFX940-NEXT: {{ $}} 189 ; GFX940-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 190 ; GFX940-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 191 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 192 ; GFX940-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 193 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 194 ; GFX940-NEXT: SI_RETURN 195 ; 196 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets 197 ; GFX10: liveins: $vgpr0 198 ; GFX10-NEXT: {{ $}} 199 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 200 ; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 201 ; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 202 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 203 ; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 204 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 205 ; GFX10-NEXT: SI_RETURN 206 ; 207 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets 208 ; GFX12: liveins: $vgpr0 209 ; GFX12-NEXT: {{ $}} 210 ; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 211 ; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 212 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 213 ; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 214 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 215 ; GFX12-NEXT: SI_RETURN 216 %vgpr_offset:vgpr_32 = COPY $vgpr0 217 %0:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 218 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 219 %1:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec 220 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 221 SI_RETURN 222 223... 224 225--- 226name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute 227tracksRegLiveness: true 228stack: 229 - { id: 0, size: 4096, alignment: 4 } 230machineFunctionInfo: 231 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 232 frameOffsetReg: '$sgpr33' 233 stackPtrOffsetReg: '$sgpr32' 234body: | 235 bb.0: 236 liveins: $vgpr0 237 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute 238 ; GFX900: liveins: $vgpr0 239 ; GFX900-NEXT: {{ $}} 240 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 241 ; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 242 ; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec 243 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 244 ; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec 245 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 246 ; GFX900-NEXT: SI_RETURN 247 ; 248 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute 249 ; GFX940: liveins: $vgpr0 250 ; GFX940-NEXT: {{ $}} 251 ; GFX940-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 252 ; GFX940-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 253 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 254 ; GFX940-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 255 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 256 ; GFX940-NEXT: SI_RETURN 257 ; 258 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute 259 ; GFX10: liveins: $vgpr0 260 ; GFX10-NEXT: {{ $}} 261 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 262 ; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 263 ; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec 264 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 265 ; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec 266 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 267 ; GFX10-NEXT: SI_RETURN 268 ; 269 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute 270 ; GFX12: liveins: $vgpr0 271 ; GFX12-NEXT: {{ $}} 272 ; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0 273 ; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 274 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 275 ; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 276 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 277 ; GFX12-NEXT: SI_RETURN 278 %vgpr_offset:vgpr_32 = COPY $vgpr0 279 %0:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 280 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 281 %1:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec 282 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 283 SI_RETURN 284 285... 286 287--- 288name: local_stack_alloc__v_add_u32_e32__sgpr_offsets 289tracksRegLiveness: true 290stack: 291 - { id: 0, size: 4096, alignment: 4 } 292machineFunctionInfo: 293 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 294 frameOffsetReg: '$sgpr33' 295 stackPtrOffsetReg: '$sgpr32' 296body: | 297 bb.0: 298 liveins: $sgpr8 299 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets 300 ; GFX900: liveins: $sgpr8 301 ; GFX900-NEXT: {{ $}} 302 ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 303 ; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 304 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 305 ; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 306 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 307 ; GFX900-NEXT: SI_RETURN 308 ; 309 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets 310 ; GFX940: liveins: $sgpr8 311 ; GFX940-NEXT: {{ $}} 312 ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 313 ; GFX940-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 314 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 315 ; GFX940-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 316 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 317 ; GFX940-NEXT: SI_RETURN 318 ; 319 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets 320 ; GFX10: liveins: $sgpr8 321 ; GFX10-NEXT: {{ $}} 322 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 323 ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 324 ; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 325 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 326 ; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit $exec 327 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 328 ; GFX10-NEXT: SI_RETURN 329 ; 330 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets 331 ; GFX12: liveins: $sgpr8 332 ; GFX12-NEXT: {{ $}} 333 ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 334 ; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 335 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]] 336 ; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 337 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]] 338 ; GFX12-NEXT: SI_RETURN 339 %sgpr_offset:sreg_32 = COPY $sgpr8 340 %0:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 341 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 342 %1:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec 343 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 344 SI_RETURN 345 346... 347 348--- 349name: local_stack_alloc__v_add_u32_e64__sgpr_offsets 350tracksRegLiveness: true 351stack: 352 - { id: 0, size: 4096, alignment: 4 } 353machineFunctionInfo: 354 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 355 frameOffsetReg: '$sgpr33' 356 stackPtrOffsetReg: '$sgpr32' 357body: | 358 bb.0: 359 liveins: $sgpr8 360 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets 361 ; GFX900: liveins: $sgpr8 362 ; GFX900-NEXT: {{ $}} 363 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 364 ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 365 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec 366 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 367 ; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec 368 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 369 ; GFX900-NEXT: SI_RETURN 370 ; 371 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets 372 ; GFX940: liveins: $sgpr8 373 ; GFX940-NEXT: {{ $}} 374 ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 375 ; GFX940-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 376 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 377 ; GFX940-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 378 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 379 ; GFX940-NEXT: SI_RETURN 380 ; 381 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets 382 ; GFX10: liveins: $sgpr8 383 ; GFX10-NEXT: {{ $}} 384 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 385 ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 386 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec 387 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 388 ; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec 389 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 390 ; GFX10-NEXT: SI_RETURN 391 ; 392 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets 393 ; GFX12: liveins: $sgpr8 394 ; GFX12-NEXT: {{ $}} 395 ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 396 ; GFX12-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 397 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 398 ; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 399 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 400 ; GFX12-NEXT: SI_RETURN 401 %sgpr_offset:sreg_32 = COPY $sgpr8 402 %0:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 403 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 404 %1:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec 405 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 406 SI_RETURN 407 408... 409 410--- 411name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute 412tracksRegLiveness: true 413stack: 414 - { id: 0, size: 4096, alignment: 4 } 415machineFunctionInfo: 416 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 417 frameOffsetReg: '$sgpr33' 418 stackPtrOffsetReg: '$sgpr32' 419body: | 420 bb.0: 421 liveins: $sgpr8 422 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute 423 ; GFX900: liveins: $sgpr8 424 ; GFX900-NEXT: {{ $}} 425 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 426 ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 427 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec 428 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 429 ; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec 430 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 431 ; GFX900-NEXT: SI_RETURN 432 ; 433 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute 434 ; GFX940: liveins: $sgpr8 435 ; GFX940-NEXT: {{ $}} 436 ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 437 ; GFX940-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 438 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 439 ; GFX940-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 440 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 441 ; GFX940-NEXT: SI_RETURN 442 ; 443 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute 444 ; GFX10: liveins: $sgpr8 445 ; GFX10-NEXT: {{ $}} 446 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 447 ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 448 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec 449 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 450 ; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec 451 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 452 ; GFX10-NEXT: SI_RETURN 453 ; 454 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute 455 ; GFX12: liveins: $sgpr8 456 ; GFX12-NEXT: {{ $}} 457 ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8 458 ; GFX12-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 459 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 460 ; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 461 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 462 ; GFX12-NEXT: SI_RETURN 463 %sgpr_offset:sreg_32 = COPY $sgpr8 464 %0:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 465 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 466 %1:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec 467 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 468 SI_RETURN 469 470... 471 472# Should be OK to fold with clamp modifier, which should be preserved. 473--- 474name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier 475tracksRegLiveness: true 476stack: 477 - { id: 0, size: 64, alignment: 4 } 478machineFunctionInfo: 479 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3' 480 frameOffsetReg: '$sgpr33' 481 stackPtrOffsetReg: '$sgpr32' 482body: | 483 bb.0: 484 ; GFX900-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier 485 ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 486 ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 487 ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 488 ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 489 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 490 ; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 1, implicit $exec 491 ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 492 ; GFX900-NEXT: SI_RETURN 493 ; 494 ; GFX940-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier 495 ; GFX940: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 1, implicit $exec 496 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 497 ; GFX940-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 1, implicit $exec 498 ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 499 ; GFX940-NEXT: SI_RETURN 500 ; 501 ; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier 502 ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8 503 ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec 504 ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec 505 ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]] 506 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]] 507 ; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 1, implicit $exec 508 ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 509 ; GFX10-NEXT: SI_RETURN 510 ; 511 ; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier 512 ; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 1, implicit $exec 513 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]] 514 ; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 1, implicit $exec 515 ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]] 516 ; GFX12-NEXT: SI_RETURN 517 %0:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, /*clamp*/1, implicit $exec 518 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0 519 %1:vgpr_32 = V_ADD_U32_e64 16, %stack.0, /*clamp*/1, implicit $exec 520 INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1 521 SI_RETURN 522 523... 524