xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.pow-gfx9.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx908 | FileCheck %s --check-prefixes=GCN,GFX908
2; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx90a | FileCheck %s --check-prefixes=GCN,GFX90A
3
4; GCN-LABEL: {{^}}mul_legacy
5; GFX908: v_mul_legacy_f32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
6; GFX90A: v_mul_legacy_f32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}{{$}}
7define amdgpu_kernel void @mul_legacy(
8    ptr addrspace(1) %r,
9    ptr addrspace(1) %a,
10    ptr addrspace(1) %b) {
11entry:
12  %a.val = load volatile float, ptr addrspace(1) %a
13  %b.val = load volatile float, ptr addrspace(1) %b
14  %r.val = call float @llvm.pow.f32(float %a.val, float %b.val)
15  store float %r.val, ptr addrspace(1) %r
16  ret void
17}
18
19declare float @llvm.pow.f32(float ,float ) readonly
20