1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4declare i32 @llvm.amdgcn.sffbh.i32(i32) #1 5 6; GCN-LABEL: {{^}}s_flbit: 7; GCN: s_load_dword [[VAL:s[0-9]+]], 8; GCN: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]] 9; GCN: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]] 10; GCN: buffer_store_dword [[VRESULT]], 11define amdgpu_kernel void @s_flbit(ptr addrspace(1) noalias %out, i32 %val) #0 { 12 %r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val) 13 store i32 %r, ptr addrspace(1) %out, align 4 14 ret void 15} 16 17; GCN-LABEL: {{^}}v_flbit: 18; GCN: buffer_load_dword [[VAL:v[0-9]+]], 19; GCN: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]] 20; GCN: buffer_store_dword [[RESULT]], 21define amdgpu_kernel void @v_flbit(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %valptr) #0 { 22 %val = load i32, ptr addrspace(1) %valptr, align 4 23 %r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val) 24 store i32 %r, ptr addrspace(1) %out, align 4 25 ret void 26} 27 28attributes #0 = { nounwind } 29attributes #1 = { nounwind readnone } 30