xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4define amdgpu_kernel void @test_sched_barrier() #0 {
5; GCN-LABEL: test_sched_barrier:
6; GCN:       ; %bb.0: ; %entry
7; GCN-NEXT:    ; sched_barrier mask(0x00000000)
8; GCN-NEXT:    ; sched_barrier mask(0x00000001)
9; GCN-NEXT:    ; sched_barrier mask(0x00000004)
10; GCN-NEXT:    ; sched_barrier mask(0x0000000F)
11; GCN-NEXT:    s_endpgm
12entry:
13  call void @llvm.amdgcn.sched.barrier(i32 0) #1
14  call void @llvm.amdgcn.sched.barrier(i32 1) #1
15  call void @llvm.amdgcn.sched.barrier(i32 4) #1
16  call void @llvm.amdgcn.sched.barrier(i32 15) #1
17  ret void
18}
19
20declare void @llvm.amdgcn.sched.barrier(i32) #1
21
22attributes #0 = { nounwind }
23attributes #1 = { convergent nounwind }
24