xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4declare i32 @llvm.amdgcn.sad.u16(i32, i32, i32) #0
5
6; GCN-LABEL: {{^}}v_sad_u16:
7; GCN: v_sad_u16 v{{[0-9]+}}, v{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}
8define amdgpu_kernel void @v_sad_u16(ptr addrspace(1) %out, i32 %src) {
9  %result= call i32 @llvm.amdgcn.sad.u16(i32 %src, i32 100, i32 100) #0
10  store i32 %result, ptr addrspace(1) %out, align 4
11  ret void
12}
13
14; GCN-LABEL: {{^}}v_sad_u16_non_immediate:
15; GCN: v_sad_u16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
16define amdgpu_kernel void @v_sad_u16_non_immediate(ptr addrspace(1) %out, i32 %src, i32 %a, i32 %b) {
17  %result= call i32 @llvm.amdgcn.sad.u16(i32 %src, i32 %a, i32 %b) #0
18  store i32 %result, ptr addrspace(1) %out, align 4
19  ret void
20}
21
22attributes #0 = { nounwind readnone }
23