xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll (revision 9afaf9c6c89efb22bccab39677e8dff47da91a00) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GCN,SDAG %s
3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck --check-prefixes=GCN,GISEL %s
4
5define amdgpu_ps void @prefetch_data_sgpr_base_sgpr_len(ptr addrspace(4) inreg %ptr, i32 inreg %len) {
6; GCN-LABEL: prefetch_data_sgpr_base_sgpr_len:
7; GCN:       ; %bb.0: ; %entry
8; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, s2, 0
9; GCN-NEXT:    s_endpgm
10entry:
11  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 %len)
12  ret void
13}
14
15define amdgpu_ps void @prefetch_data_sgpr_imm_base_sgpr_len(ptr addrspace(4) inreg %ptr, i32 inreg %len) {
16; GCN-LABEL: prefetch_data_sgpr_imm_base_sgpr_len:
17; GCN:       ; %bb.0: ; %entry
18; GCN-NEXT:    s_prefetch_data s[0:1], 0x200, s2, 0
19; GCN-NEXT:    s_endpgm
20entry:
21  %gep = getelementptr i32, ptr addrspace(4) %ptr, i32 128
22  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %gep, i32 %len)
23  ret void
24}
25
26define amdgpu_ps void @prefetch_data_sgpr_base_imm_len(ptr addrspace(4) inreg %ptr) {
27; GCN-LABEL: prefetch_data_sgpr_base_imm_len:
28; GCN:       ; %bb.0: ; %entry
29; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, null, 31
30; GCN-NEXT:    s_endpgm
31entry:
32  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 31)
33  ret void
34}
35
36define amdgpu_ps void @prefetch_data_sgpr_imm_base_imm_len(ptr addrspace(4) inreg %ptr) {
37; GCN-LABEL: prefetch_data_sgpr_imm_base_imm_len:
38; GCN:       ; %bb.0: ; %entry
39; GCN-NEXT:    s_prefetch_data s[0:1], 0x200, null, 31
40; GCN-NEXT:    s_endpgm
41entry:
42  %gep = getelementptr i32, ptr addrspace(4) %ptr, i32 128
43  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %gep, i32 31)
44  ret void
45}
46
47define amdgpu_ps void @prefetch_data_vgpr_base_sgpr_len(ptr addrspace(4) %ptr, i32 inreg %len) {
48; GCN-LABEL: prefetch_data_vgpr_base_sgpr_len:
49; GCN:       ; %bb.0: ; %entry
50; GCN-NEXT:    v_readfirstlane_b32 s2, v0
51; GCN-NEXT:    v_readfirstlane_b32 s3, v1
52; GCN-NEXT:    s_prefetch_data s[2:3], 0x0, s0, 0
53; GCN-NEXT:    s_endpgm
54entry:
55  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 %len)
56  ret void
57}
58
59define amdgpu_ps void @prefetch_data_vgpr_imm_base_sgpr_len(ptr addrspace(4) %ptr, i32 inreg %len) {
60; SDAG-LABEL: prefetch_data_vgpr_imm_base_sgpr_len:
61; SDAG:       ; %bb.0: ; %entry
62; SDAG-NEXT:    v_readfirstlane_b32 s2, v0
63; SDAG-NEXT:    v_readfirstlane_b32 s3, v1
64; SDAG-NEXT:    s_prefetch_data s[2:3], 0x200, s0, 0
65; SDAG-NEXT:    s_endpgm
66;
67; GISEL-LABEL: prefetch_data_vgpr_imm_base_sgpr_len:
68; GISEL:       ; %bb.0: ; %entry
69; GISEL-NEXT:    v_add_co_u32 v0, vcc_lo, 0x200, v0
70; GISEL-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
71; GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
72; GISEL-NEXT:    v_readfirstlane_b32 s2, v0
73; GISEL-NEXT:    v_readfirstlane_b32 s3, v1
74; GISEL-NEXT:    s_prefetch_data s[2:3], 0x0, s0, 0
75; GISEL-NEXT:    s_endpgm
76entry:
77  %gep = getelementptr i32, ptr addrspace(4) %ptr, i32 128
78  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %gep, i32 %len)
79  ret void
80}
81
82define amdgpu_ps void @prefetch_data_sgpr_base_vgpr_len(ptr addrspace(4) inreg %ptr, i32 %len) {
83; GCN-LABEL: prefetch_data_sgpr_base_vgpr_len:
84; GCN:       ; %bb.0: ; %entry
85; GCN-NEXT:    v_readfirstlane_b32 s2, v0
86; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, s2, 0
87; GCN-NEXT:    s_endpgm
88entry:
89  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 %len)
90  ret void
91}
92
93define amdgpu_ps void @prefetch_data_sgpr_base_imm_len_global(ptr addrspace(1) inreg %ptr) {
94; GCN-LABEL: prefetch_data_sgpr_base_imm_len_global:
95; GCN:       ; %bb.0: ; %entry
96; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, null, 31
97; GCN-NEXT:    s_endpgm
98entry:
99  tail call void @llvm.amdgcn.s.prefetch.data.p1(ptr addrspace(1) %ptr, i32 31)
100  ret void
101}
102
103define amdgpu_ps void @prefetch_data_sgpr_base_imm_len_flat(ptr inreg %ptr) {
104; GCN-LABEL: prefetch_data_sgpr_base_imm_len_flat:
105; GCN:       ; %bb.0: ; %entry
106; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, null, 31
107; GCN-NEXT:    s_endpgm
108entry:
109  tail call void @llvm.amdgcn.s.prefetch.data.p0(ptr %ptr, i32 31)
110  ret void
111}
112
113define amdgpu_ps void @prefetch_data_vgpr_base_imm_len(ptr addrspace(4) %ptr) {
114; GCN-LABEL: prefetch_data_vgpr_base_imm_len:
115; GCN:       ; %bb.0: ; %entry
116; GCN-NEXT:    v_readfirstlane_b32 s0, v0
117; GCN-NEXT:    v_readfirstlane_b32 s1, v1
118; GCN-NEXT:    s_prefetch_data s[0:1], 0x0, null, 0
119; GCN-NEXT:    s_endpgm
120entry:
121  tail call void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 0)
122  ret void
123}
124
125declare void @llvm.amdgcn.s.prefetch.data.p4(ptr addrspace(4) %ptr, i32 %len)
126declare void @llvm.amdgcn.s.prefetch.data.p1(ptr addrspace(1) %ptr, i32 %len)
127declare void @llvm.amdgcn.s.prefetch.data.p0(ptr %ptr, i32 %len)
128