xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -mcpu=fiji -show-mc-encoding < %s | FileCheck -check-prefix=VI %s
2
3declare void @llvm.amdgcn.s.dcache.wb() #0
4declare void @llvm.amdgcn.s.waitcnt(i32) #0
5
6; VI-LABEL: {{^}}test_s_dcache_wb:
7; VI-NEXT: ; %bb.0:
8; VI-NEXT: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
9; VI-NEXT: s_endpgm
10define amdgpu_kernel void @test_s_dcache_wb() #0 {
11  call void @llvm.amdgcn.s.dcache.wb()
12  ret void
13}
14
15; VI-LABEL: {{^}}test_s_dcache_wb_insert_wait:
16; VI-NEXT: ; %bb.0:
17; VI: s_dcache_wb
18; VI: s_waitcnt lgkmcnt(0) ; encoding
19define amdgpu_kernel void @test_s_dcache_wb_insert_wait() #0 {
20  call void @llvm.amdgcn.s.dcache.wb()
21  call void @llvm.amdgcn.s.waitcnt(i32 127)
22  br label %end
23
24end:
25  store volatile i32 3, ptr addrspace(1) undef
26  ret void
27}
28
29attributes #0 = { nounwind }
30