1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-SDAG %s 3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX950,GFX950-GISEL %s 4; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx940 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-SDAG %s 5; RUN: not --crash llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx940 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR-GISEL %s 6 7; FIXME: Not a great error 8; ERR-SDAG: LLVM ERROR: Do not know how to expand this operator's operand! 9; ERR-GISEL: LLVM ERROR: cannot select: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.raw.ptr.buffer.load.lds), 10 11declare void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) nocapture, i32 %size, i32 %voffset, i32 %soffset, i32 %offset, i32 %aux) 12 13;---------------------------------------------------------------------y 14; dwordx3 15;--------------------------------------------------------------------- 16 17define amdgpu_ps float @buffer_load_lds_dwordx3(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) { 18; GFX950-LABEL: buffer_load_lds_dwordx3: 19; GFX950: ; %bb.0: ; %main_body 20; GFX950-NEXT: s_mov_b32 m0, s4 21; GFX950-NEXT: s_nop 0 22; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 lds 23; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:4 sc0 lds 24; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:8 nt lds 25; GFX950-NEXT: v_mov_b32_e32 v0, s4 26; GFX950-NEXT: s_waitcnt vmcnt(0) 27; GFX950-NEXT: ds_read_b32 v0, v0 28; GFX950-NEXT: s_waitcnt lgkmcnt(0) 29; GFX950-NEXT: ; return to shader part epilog 30main_body: 31 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 0, i32 0) 32 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 4, i32 1) 33 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 8, i32 2) 34 %res = load float, ptr addrspace(3) %lds 35 ret float %res 36} 37 38define amdgpu_ps void @buffer_load_lds_dwordx3_imm_voffset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) { 39; GFX950-LABEL: buffer_load_lds_dwordx3_imm_voffset: 40; GFX950: ; %bb.0: 41; GFX950-NEXT: v_mov_b32_e32 v0, 0x800 42; GFX950-NEXT: s_mov_b32 m0, s4 43; GFX950-NEXT: s_nop 0 44; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 offen lds 45; GFX950-NEXT: s_endpgm 46 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 2048, i32 0, i32 0, i32 0) 47 ret void 48} 49 50define amdgpu_ps void @buffer_load_lds_dwordx3_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset) { 51; GFX950-LABEL: buffer_load_lds_dwordx3_v_offset: 52; GFX950: ; %bb.0: 53; GFX950-NEXT: s_mov_b32 m0, s4 54; GFX950-NEXT: s_nop 0 55; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], 0 offen lds 56; GFX950-NEXT: s_endpgm 57 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 0, i32 0, i32 0) 58 ret void 59} 60 61define amdgpu_ps void @buffer_load_lds_dwordx3_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 inreg %soffset) { 62; GFX950-LABEL: buffer_load_lds_dwordx3_s_offset: 63; GFX950: ; %bb.0: 64; GFX950-NEXT: s_mov_b32 m0, s4 65; GFX950-NEXT: s_nop 0 66; GFX950-NEXT: buffer_load_dwordx3 off, s[0:3], s5 lds 67; GFX950-NEXT: s_endpgm 68 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 0, i32 %soffset, i32 0, i32 0) 69 ret void 70} 71 72define amdgpu_ps void @buffer_load_lds_dwordx3_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) { 73; GFX950-LABEL: buffer_load_lds_dwordx3_vs_offset: 74; GFX950: ; %bb.0: 75; GFX950-NEXT: s_mov_b32 m0, s4 76; GFX950-NEXT: s_nop 0 77; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], s5 offen lds 78; GFX950-NEXT: s_endpgm 79 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 %soffset, i32 0, i32 0) 80 ret void 81} 82 83define amdgpu_ps void @buffer_load_lds_dwordx3_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) { 84; GFX950-LABEL: buffer_load_lds_dwordx3_vs_imm_offset: 85; GFX950: ; %bb.0: 86; GFX950-NEXT: s_mov_b32 m0, s4 87; GFX950-NEXT: s_nop 0 88; GFX950-NEXT: buffer_load_dwordx3 v0, s[0:3], s5 offen offset:2048 lds 89; GFX950-NEXT: s_endpgm 90 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 12, i32 %voffset, i32 %soffset, i32 2048, i32 0) 91 ret void 92} 93 94;---------------------------------------------------------------------y 95; dwordx4 96;--------------------------------------------------------------------- 97 98define amdgpu_ps float @buffer_load_lds_dwordx4(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) { 99; GFX950-LABEL: buffer_load_lds_dwordx4: 100; GFX950: ; %bb.0: ; %main_body 101; GFX950-NEXT: s_mov_b32 m0, s4 102; GFX950-NEXT: s_nop 0 103; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 lds 104; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:4 sc0 lds 105; GFX950-NEXT: buffer_load_dword off, s[0:3], 0 offset:8 nt lds 106; GFX950-NEXT: v_mov_b32_e32 v0, s4 107; GFX950-NEXT: s_waitcnt vmcnt(0) 108; GFX950-NEXT: ds_read_b32 v0, v0 109; GFX950-NEXT: s_waitcnt lgkmcnt(0) 110; GFX950-NEXT: ; return to shader part epilog 111main_body: 112 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 0, i32 0) 113 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 4, i32 1) 114 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 4, i32 0, i32 0, i32 8, i32 2) 115 %res = load float, ptr addrspace(3) %lds 116 ret float %res 117} 118 119define amdgpu_ps void @buffer_load_lds_dwordx4_imm_voffset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds) { 120; GFX950-LABEL: buffer_load_lds_dwordx4_imm_voffset: 121; GFX950: ; %bb.0: 122; GFX950-NEXT: v_mov_b32_e32 v0, 0x800 123; GFX950-NEXT: s_mov_b32 m0, s4 124; GFX950-NEXT: s_nop 0 125; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 offen lds 126; GFX950-NEXT: s_endpgm 127 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 2048, i32 0, i32 0, i32 0) 128 ret void 129} 130 131define amdgpu_ps void @buffer_load_lds_dwordx4_v_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset) { 132; GFX950-LABEL: buffer_load_lds_dwordx4_v_offset: 133; GFX950: ; %bb.0: 134; GFX950-NEXT: s_mov_b32 m0, s4 135; GFX950-NEXT: s_nop 0 136; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], 0 offen lds 137; GFX950-NEXT: s_endpgm 138 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 0, i32 0, i32 0) 139 ret void 140} 141 142define amdgpu_ps void @buffer_load_lds_dwordx4_s_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 inreg %soffset) { 143; GFX950-LABEL: buffer_load_lds_dwordx4_s_offset: 144; GFX950: ; %bb.0: 145; GFX950-NEXT: s_mov_b32 m0, s4 146; GFX950-NEXT: s_nop 0 147; GFX950-NEXT: buffer_load_dwordx4 off, s[0:3], s5 lds 148; GFX950-NEXT: s_endpgm 149 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 0, i32 %soffset, i32 0, i32 0) 150 ret void 151} 152 153define amdgpu_ps void @buffer_load_lds_dwordx4_vs_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) { 154; GFX950-LABEL: buffer_load_lds_dwordx4_vs_offset: 155; GFX950: ; %bb.0: 156; GFX950-NEXT: s_mov_b32 m0, s4 157; GFX950-NEXT: s_nop 0 158; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], s5 offen lds 159; GFX950-NEXT: s_endpgm 160 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 %soffset, i32 0, i32 0) 161 ret void 162} 163 164define amdgpu_ps void @buffer_load_lds_dwordx4_vs_imm_offset(ptr addrspace(8) inreg %rsrc, ptr addrspace(3) inreg %lds, i32 %voffset, i32 inreg %soffset) { 165; GFX950-LABEL: buffer_load_lds_dwordx4_vs_imm_offset: 166; GFX950: ; %bb.0: 167; GFX950-NEXT: s_mov_b32 m0, s4 168; GFX950-NEXT: s_nop 0 169; GFX950-NEXT: buffer_load_dwordx4 v0, s[0:3], s5 offen offset:2048 lds 170; GFX950-NEXT: s_endpgm 171 call void @llvm.amdgcn.raw.ptr.buffer.load.lds(ptr addrspace(8) %rsrc, ptr addrspace(3) %lds, i32 16, i32 %voffset, i32 %soffset, i32 2048, i32 0) 172 ret void 173} 174;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 175; GFX950-GISEL: {{.*}} 176; GFX950-SDAG: {{.*}} 177