1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefixes=GFX9,SDAG,GFX9-SDAG 3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefixes=GFX9,GFX9-GISEL 4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck %s -check-prefixes=GFX10,SDAG,GFX10-SDAG 5; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck %s -check-prefixes=GFX10,GFX10-GISEL 6 7declare void @foo(i32) 8 9define amdgpu_ps void @test(ptr addrspace(1) inreg %ptr) { 10; SDAG-LABEL: test: 11; SDAG: ; %bb.0: 12; SDAG-NEXT: s_mov_b32 s2, src_pops_exiting_wave_id 13; SDAG-NEXT: v_mov_b32_e32 v0, 0 14; SDAG-NEXT: v_mov_b32_e32 v1, s2 15; SDAG-NEXT: global_store_dword v0, v1, s[0:1] 16; SDAG-NEXT: s_endpgm 17; 18; GFX9-GISEL-LABEL: test: 19; GFX9-GISEL: ; %bb.0: 20; GFX9-GISEL-NEXT: s_mov_b32 s2, src_pops_exiting_wave_id 21; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s2 22; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0 23; GFX9-GISEL-NEXT: global_store_dword v1, v0, s[0:1] 24; GFX9-GISEL-NEXT: s_endpgm 25; 26; GFX10-GISEL-LABEL: test: 27; GFX10-GISEL: ; %bb.0: 28; GFX10-GISEL-NEXT: s_mov_b32 s2, src_pops_exiting_wave_id 29; GFX10-GISEL-NEXT: v_mov_b32_e32 v1, 0 30; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2 31; GFX10-GISEL-NEXT: global_store_dword v1, v0, s[0:1] 32; GFX10-GISEL-NEXT: s_endpgm 33 %id = call i32 @llvm.amdgcn.pops.exiting.wave.id() 34 store i32 %id, ptr addrspace(1) %ptr 35 ret void 36} 37 38define amdgpu_ps void @test_loop() { 39; GFX9-LABEL: test_loop: 40; GFX9: ; %bb.0: 41; GFX9-NEXT: .LBB1_1: ; %loop 42; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 43; GFX9-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 44; GFX9-NEXT: s_cmp_eq_u32 s0, 0 45; GFX9-NEXT: s_cbranch_scc1 .LBB1_1 46; GFX9-NEXT: ; %bb.2: ; %exit 47; GFX9-NEXT: s_endpgm 48; 49; GFX10-LABEL: test_loop: 50; GFX10: ; %bb.0: 51; GFX10-NEXT: .LBB1_1: ; %loop 52; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 53; GFX10-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 54; GFX10-NEXT: s_cmp_eq_u32 s0, 0 55; GFX10-NEXT: s_cbranch_scc1 .LBB1_1 56; GFX10-NEXT: ; %bb.2: ; %exit 57; GFX10-NEXT: s_endpgm 58 br label %loop 59loop: 60 %id = call i32 @llvm.amdgcn.pops.exiting.wave.id() 61 %cond = icmp eq i32 %id, 0 62 br i1 %cond, label %loop, label %exit 63exit: 64 ret void 65} 66 67define amdgpu_ps i32 @test_if(i1 inreg %cond) { 68; SDAG-LABEL: test_if: 69; SDAG: ; %bb.0: ; %entry 70; SDAG-NEXT: s_bitcmp0_b32 s0, 0 71; SDAG-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 72; SDAG-NEXT: s_cbranch_scc1 .LBB2_2 73; SDAG-NEXT: ; %bb.1: ; %body 74; SDAG-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 75; SDAG-NEXT: .LBB2_2: ; %exit 76; SDAG-NEXT: ; return to shader part epilog 77; 78; GFX9-GISEL-LABEL: test_if: 79; GFX9-GISEL: ; %bb.0: ; %entry 80; GFX9-GISEL-NEXT: s_mov_b32 s1, s0 81; GFX9-GISEL-NEXT: s_xor_b32 s1, s1, 1 82; GFX9-GISEL-NEXT: s_and_b32 s1, s1, 1 83; GFX9-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 84; GFX9-GISEL-NEXT: s_cmp_lg_u32 s1, 0 85; GFX9-GISEL-NEXT: s_cbranch_scc1 .LBB2_2 86; GFX9-GISEL-NEXT: ; %bb.1: ; %body 87; GFX9-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 88; GFX9-GISEL-NEXT: .LBB2_2: ; %exit 89; GFX9-GISEL-NEXT: ; return to shader part epilog 90; 91; GFX10-GISEL-LABEL: test_if: 92; GFX10-GISEL: ; %bb.0: ; %entry 93; GFX10-GISEL-NEXT: s_xor_b32 s0, s0, 1 94; GFX10-GISEL-NEXT: s_and_b32 s1, s0, 1 95; GFX10-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 96; GFX10-GISEL-NEXT: s_cmp_lg_u32 s1, 0 97; GFX10-GISEL-NEXT: s_cbranch_scc1 .LBB2_2 98; GFX10-GISEL-NEXT: ; %bb.1: ; %body 99; GFX10-GISEL-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 100; GFX10-GISEL-NEXT: .LBB2_2: ; %exit 101; GFX10-GISEL-NEXT: ; return to shader part epilog 102entry: 103 %id1 = call i32 @llvm.amdgcn.pops.exiting.wave.id() 104 br i1 %cond, label %body, label %exit 105body: 106 %id2 = call i32 @llvm.amdgcn.pops.exiting.wave.id() 107 br label %exit 108exit: 109 %id = phi i32 [ %id1, %entry ], [ %id2, %body ] 110 ret i32 %id 111} 112 113define amdgpu_ps void @test_call(ptr addrspace(1) inreg %ptr) { 114; GFX9-SDAG-LABEL: test_call: 115; GFX9-SDAG: ; %bb.0: 116; GFX9-SDAG-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 117; GFX9-SDAG-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 118; GFX9-SDAG-NEXT: s_mov_b32 s38, -1 119; GFX9-SDAG-NEXT: s_mov_b32 s39, 0xe00000 120; GFX9-SDAG-NEXT: s_add_u32 s36, s36, s2 121; GFX9-SDAG-NEXT: s_addc_u32 s37, s37, 0 122; GFX9-SDAG-NEXT: s_getpc_b64 s[0:1] 123; GFX9-SDAG-NEXT: s_add_u32 s0, s0, foo@gotpcrel32@lo+4 124; GFX9-SDAG-NEXT: s_addc_u32 s1, s1, foo@gotpcrel32@hi+12 125; GFX9-SDAG-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 126; GFX9-SDAG-NEXT: s_mov_b32 s6, src_pops_exiting_wave_id 127; GFX9-SDAG-NEXT: s_mov_b64 s[0:1], s[36:37] 128; GFX9-SDAG-NEXT: s_mov_b64 s[8:9], 36 129; GFX9-SDAG-NEXT: s_mov_b64 s[2:3], s[38:39] 130; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, s6 131; GFX9-SDAG-NEXT: s_mov_b32 s32, 0 132; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0) 133; GFX9-SDAG-NEXT: s_swappc_b64 s[30:31], s[4:5] 134; GFX9-SDAG-NEXT: s_endpgm 135; 136; GFX9-GISEL-LABEL: test_call: 137; GFX9-GISEL: ; %bb.0: 138; GFX9-GISEL-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 139; GFX9-GISEL-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 140; GFX9-GISEL-NEXT: s_mov_b32 s38, -1 141; GFX9-GISEL-NEXT: s_mov_b32 s39, 0xe00000 142; GFX9-GISEL-NEXT: s_add_u32 s36, s36, s2 143; GFX9-GISEL-NEXT: s_addc_u32 s37, s37, 0 144; GFX9-GISEL-NEXT: s_getpc_b64 s[0:1] 145; GFX9-GISEL-NEXT: s_add_u32 s0, s0, foo@gotpcrel32@lo+4 146; GFX9-GISEL-NEXT: s_addc_u32 s1, s1, foo@gotpcrel32@hi+12 147; GFX9-GISEL-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 148; GFX9-GISEL-NEXT: s_mov_b32 s2, src_pops_exiting_wave_id 149; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, s2 150; GFX9-GISEL-NEXT: s_mov_b64 s[0:1], s[36:37] 151; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], s[38:39] 152; GFX9-GISEL-NEXT: s_mov_b64 s[8:9], 36 153; GFX9-GISEL-NEXT: s_mov_b32 s32, 0 154; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0) 155; GFX9-GISEL-NEXT: s_swappc_b64 s[30:31], s[4:5] 156; GFX9-GISEL-NEXT: s_endpgm 157; 158; GFX10-LABEL: test_call: 159; GFX10: ; %bb.0: 160; GFX10-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 161; GFX10-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 162; GFX10-NEXT: s_mov_b32 s38, -1 163; GFX10-NEXT: s_mov_b32 s39, 0x31c16000 164; GFX10-NEXT: s_add_u32 s36, s36, s2 165; GFX10-NEXT: s_addc_u32 s37, s37, 0 166; GFX10-NEXT: s_getpc_b64 s[0:1] 167; GFX10-NEXT: s_add_u32 s0, s0, foo@gotpcrel32@lo+4 168; GFX10-NEXT: s_addc_u32 s1, s1, foo@gotpcrel32@hi+12 169; GFX10-NEXT: s_mov_b64 s[8:9], 36 170; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0 171; GFX10-NEXT: s_mov_b32 s0, src_pops_exiting_wave_id 172; GFX10-NEXT: s_mov_b32 s32, 0 173; GFX10-NEXT: v_mov_b32_e32 v0, s0 174; GFX10-NEXT: s_mov_b64 s[0:1], s[36:37] 175; GFX10-NEXT: s_mov_b64 s[2:3], s[38:39] 176; GFX10-NEXT: s_waitcnt lgkmcnt(0) 177; GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5] 178; GFX10-NEXT: s_endpgm 179 %id = call i32 @llvm.amdgcn.pops.exiting.wave.id() 180 call void @foo(i32 %id) 181 ret void 182} 183 184;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 185; GFX10-SDAG: {{.*}} 186