xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll (revision 657fb4433e027722e8c9a5002d0c194ecd3f2956) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4define amdgpu_kernel void @test_iglp_opt() #0 {
5; GCN-LABEL: test_iglp_opt:
6; GCN:       ; %bb.0: ; %entry
7; GCN-NEXT:    ; iglp_opt mask(0x00000000)
8; GCN-NEXT:    s_endpgm
9entry:
10  call void @llvm.amdgcn.iglp.opt(i32 0) #1
11  ret void
12}
13
14define amdgpu_kernel void @test_iglp_opt_mfma_gemm(ptr addrspace(3) noalias %in, ptr addrspace(3) noalias %out) #0 {
15; GCN-LABEL: test_iglp_opt_mfma_gemm:
16; GCN:       ; %bb.0: ; %entry
17; GCN-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
18; GCN-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
19; GCN-NEXT:    v_and_b32_e32 v0, 0x1ff80, v0
20; GCN-NEXT:    v_mov_b32_e32 v3, 2.0
21; GCN-NEXT:    ; iglp_opt mask(0x00000000)
22; GCN-NEXT:    s_waitcnt lgkmcnt(0)
23; GCN-NEXT:    v_add_u32_e32 v1, s0, v0
24; GCN-NEXT:    v_add_u32_e32 v2, 0x6000, v1
25; GCN-NEXT:    ds_read_b128 a[28:31], v2 offset:57456
26; GCN-NEXT:    ds_read_b128 a[24:27], v2 offset:57440
27; GCN-NEXT:    ds_read_b128 a[20:23], v2 offset:57424
28; GCN-NEXT:    ds_read_b128 a[16:19], v2 offset:57408
29; GCN-NEXT:    ds_read_b128 a[0:3], v2 offset:57344
30; GCN-NEXT:    ds_read_b128 a[4:7], v2 offset:57360
31; GCN-NEXT:    ds_read_b128 a[8:11], v2 offset:57376
32; GCN-NEXT:    ds_read_b128 a[12:15], v2 offset:57392
33; GCN-NEXT:    v_mov_b32_e32 v2, 1.0
34; GCN-NEXT:    ds_read_b128 a[60:63], v1 offset:49264
35; GCN-NEXT:    ds_read_b128 a[56:59], v1 offset:49248
36; GCN-NEXT:    ds_read_b128 a[52:55], v1 offset:49232
37; GCN-NEXT:    ds_read_b128 a[48:51], v1 offset:49216
38; GCN-NEXT:    ds_read_b128 a[44:47], v1 offset:49200
39; GCN-NEXT:    ds_read_b128 a[40:43], v1 offset:49184
40; GCN-NEXT:    ds_read_b128 a[36:39], v1 offset:49168
41; GCN-NEXT:    ds_read_b128 a[32:35], v1 offset:49152
42; GCN-NEXT:    s_waitcnt lgkmcnt(8)
43; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[0:31], v2, v3, a[0:31]
44; GCN-NEXT:    ds_read_b128 a[156:159], v1 offset:112
45; GCN-NEXT:    ds_read_b128 a[152:155], v1 offset:96
46; GCN-NEXT:    ds_read_b128 a[68:71], v1 offset:24592
47; GCN-NEXT:    ds_read_b128 a[64:67], v1 offset:24576
48; GCN-NEXT:    v_add_u32_e32 v0, s1, v0
49; GCN-NEXT:    s_waitcnt lgkmcnt(4)
50; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[32:63], v2, v3, a[32:63]
51; GCN-NEXT:    ds_read_b128 a[148:151], v1 offset:80
52; GCN-NEXT:    ds_read_b128 a[144:147], v1 offset:64
53; GCN-NEXT:    ds_read_b128 a[128:131], v1
54; GCN-NEXT:    ds_read_b128 a[132:135], v1 offset:16
55; GCN-NEXT:    ds_read_b128 a[136:139], v1 offset:32
56; GCN-NEXT:    ds_read_b128 a[140:143], v1 offset:48
57; GCN-NEXT:    s_waitcnt lgkmcnt(0)
58; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[128:159], v2, v3, a[128:159]
59; GCN-NEXT:    ds_read_b128 a[124:127], v1 offset:8304
60; GCN-NEXT:    ds_read_b128 a[120:123], v1 offset:8288
61; GCN-NEXT:    ds_read_b128 a[116:119], v1 offset:8272
62; GCN-NEXT:    ds_read_b128 a[112:115], v1 offset:8256
63; GCN-NEXT:    ds_read_b128 a[108:111], v1 offset:8240
64; GCN-NEXT:    ds_read_b128 a[104:107], v1 offset:8224
65; GCN-NEXT:    ds_read_b128 a[100:103], v1 offset:8208
66; GCN-NEXT:    ds_read_b128 a[96:99], v1 offset:8192
67; GCN-NEXT:    s_waitcnt lgkmcnt(0)
68; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[96:127], v2, v3, a[96:127]
69; GCN-NEXT:    ds_read_b128 a[92:95], v1 offset:24688
70; GCN-NEXT:    ds_read_b128 a[88:91], v1 offset:24672
71; GCN-NEXT:    ds_read_b128 a[84:87], v1 offset:24656
72; GCN-NEXT:    ds_read_b128 a[80:83], v1 offset:24640
73; GCN-NEXT:    ds_read_b128 a[76:79], v1 offset:24624
74; GCN-NEXT:    ds_read_b128 a[72:75], v1 offset:24608
75; GCN-NEXT:    s_nop 2
76; GCN-NEXT:    ds_write_b128 v0, a[156:159] offset:112
77; GCN-NEXT:    ds_write_b128 v0, a[152:155] offset:96
78; GCN-NEXT:    ds_write_b128 v0, a[148:151] offset:80
79; GCN-NEXT:    ds_write_b128 v0, a[144:147] offset:64
80; GCN-NEXT:    ds_write_b128 v0, a[140:143] offset:48
81; GCN-NEXT:    ds_write_b128 v0, a[136:139] offset:32
82; GCN-NEXT:    ds_write_b128 v0, a[132:135] offset:16
83; GCN-NEXT:    ds_write_b128 v0, a[128:131]
84; GCN-NEXT:    v_mov_b32_e32 v0, s1
85; GCN-NEXT:    s_waitcnt lgkmcnt(8)
86; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[64:95], v2, v3, a[64:95]
87; GCN-NEXT:    ds_write_b128 v0, a[56:59] offset:24672
88; GCN-NEXT:    ds_write_b128 v0, a[60:63] offset:24688
89; GCN-NEXT:    ds_write_b128 v0, a[48:51] offset:24640
90; GCN-NEXT:    ds_write_b128 v0, a[120:123] offset:8288
91; GCN-NEXT:    ds_write_b128 v0, a[124:127] offset:8304
92; GCN-NEXT:    ds_write_b128 v0, a[112:115] offset:8256
93; GCN-NEXT:    ds_write_b128 v0, a[116:119] offset:8272
94; GCN-NEXT:    ds_write_b128 v0, a[104:107] offset:8224
95; GCN-NEXT:    ds_write_b128 v0, a[108:111] offset:8240
96; GCN-NEXT:    ds_write_b128 v0, a[96:99] offset:8192
97; GCN-NEXT:    ds_write_b128 v0, a[100:103] offset:8208
98; GCN-NEXT:    ds_write_b128 v0, a[52:55] offset:24656
99; GCN-NEXT:    ds_write_b128 v0, a[40:43] offset:24608
100; GCN-NEXT:    ds_write_b128 v0, a[44:47] offset:24624
101; GCN-NEXT:    ds_write_b128 v0, a[32:35] offset:24576
102; GCN-NEXT:    ds_write_b128 v0, a[36:39] offset:24592
103; GCN-NEXT:    ds_write_b128 v0, a[24:27] offset:32864
104; GCN-NEXT:    ds_write_b128 v0, a[28:31] offset:32880
105; GCN-NEXT:    ds_write_b128 v0, a[16:19] offset:32832
106; GCN-NEXT:    ds_write_b128 v0, a[88:91] offset:16480
107; GCN-NEXT:    ds_write_b128 v0, a[92:95] offset:16496
108; GCN-NEXT:    ds_write_b128 v0, a[80:83] offset:16448
109; GCN-NEXT:    ds_write_b128 v0, a[84:87] offset:16464
110; GCN-NEXT:    ds_write_b128 v0, a[72:75] offset:16416
111; GCN-NEXT:    ds_write_b128 v0, a[76:79] offset:16432
112; GCN-NEXT:    ds_write_b128 v0, a[64:67] offset:16384
113; GCN-NEXT:    ds_write_b128 v0, a[68:71] offset:16400
114; GCN-NEXT:    ds_write_b128 v0, a[20:23] offset:32848
115; GCN-NEXT:    ds_write_b128 v0, a[8:11] offset:32800
116; GCN-NEXT:    ds_write_b128 v0, a[12:15] offset:32816
117; GCN-NEXT:    ds_write_b128 v0, a[0:3] offset:32768
118; GCN-NEXT:    ds_write_b128 v0, a[4:7] offset:32784
119; GCN-NEXT:    s_endpgm
120entry:
121  call void @llvm.amdgcn.iglp.opt(i32 0)
122  %idx = call i32 @llvm.amdgcn.workitem.id.x()
123  %load.0.addr = getelementptr <32 x float>, ptr addrspace(3) %in, i32 %idx
124  %load.0 = load <32 x float>, ptr addrspace(3) %load.0.addr
125  %load.1.addr = getelementptr <32 x float>, ptr addrspace(3) %load.0.addr, i32 64
126  %load.1 = load <32 x float>, ptr addrspace(3) %load.1.addr
127  %load.2.addr = getelementptr <32 x float>, ptr addrspace(3) %load.1.addr, i32 128
128  %load.2 = load <32 x float>, ptr addrspace(3) %load.2.addr
129  %load.3.addr = getelementptr <32 x float>, ptr addrspace(3) %load.2.addr, i32 192
130  %load.3 = load <32 x float>, ptr addrspace(3) %load.3.addr
131  %load.4.addr = getelementptr <32 x float>, ptr addrspace(3) %load.3.addr, i32 256
132  %load.4 = load <32 x float>, ptr addrspace(3) %load.4.addr
133  %mai.0 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.0, i32 0, i32 0, i32 0)
134  %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.1, i32 0, i32 0, i32 0)
135  %mai.2 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.2, i32 0, i32 0, i32 0)
136  %mai.3 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.3, i32 0, i32 0, i32 0)
137  %mai.4 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.4, i32 0, i32 0, i32 0)
138  %store.0.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 %idx
139  store <32 x float> %mai.0, ptr addrspace(3) %store.0.addr
140  %store.1.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 64
141  store <32 x float> %mai.1, ptr addrspace(3) %store.1.addr
142  %store.2.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 128
143  store <32 x float> %mai.2, ptr addrspace(3) %store.2.addr
144  %store.3.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 192
145  store <32 x float> %mai.3, ptr addrspace(3) %store.3.addr
146  %store.4.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 256
147  store <32 x float> %mai.4, ptr addrspace(3) %store.4.addr
148  ret void
149}
150
151
152define amdgpu_kernel void @test_iglp_opt_rev_mfma_gemm(ptr addrspace(3) noalias %in, ptr addrspace(3) noalias %out) #0 {
153; GCN-LABEL: test_iglp_opt_rev_mfma_gemm:
154; GCN:       ; %bb.0: ; %entry
155; GCN-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
156; GCN-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
157; GCN-NEXT:    v_and_b32_e32 v0, 0x1ff80, v0
158; GCN-NEXT:    v_mov_b32_e32 v2, 1.0
159; GCN-NEXT:    v_mov_b32_e32 v3, 2.0
160; GCN-NEXT:    s_waitcnt lgkmcnt(0)
161; GCN-NEXT:    v_add_u32_e32 v1, s0, v0
162; GCN-NEXT:    ds_read_b128 a[28:31], v1 offset:112
163; GCN-NEXT:    ds_read_b128 a[24:27], v1 offset:96
164; GCN-NEXT:    ds_read_b128 a[20:23], v1 offset:80
165; GCN-NEXT:    ds_read_b128 a[16:19], v1 offset:64
166; GCN-NEXT:    ds_read_b128 a[0:3], v1
167; GCN-NEXT:    ds_read_b128 a[4:7], v1 offset:16
168; GCN-NEXT:    ds_read_b128 a[8:11], v1 offset:32
169; GCN-NEXT:    ds_read_b128 a[12:15], v1 offset:48
170; GCN-NEXT:    s_waitcnt lgkmcnt(0)
171; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[0:31], v2, v3, a[0:31]
172; GCN-NEXT:    ds_read_b128 a[156:159], v1 offset:8304
173; GCN-NEXT:    ds_read_b128 a[152:155], v1 offset:8288
174; GCN-NEXT:    ds_read_b128 a[148:151], v1 offset:8272
175; GCN-NEXT:    ds_read_b128 a[144:147], v1 offset:8256
176; GCN-NEXT:    ds_read_b128 a[140:143], v1 offset:8240
177; GCN-NEXT:    ds_read_b128 a[136:139], v1 offset:8224
178; GCN-NEXT:    ds_read_b128 a[132:135], v1 offset:8208
179; GCN-NEXT:    ds_read_b128 a[128:131], v1 offset:8192
180; GCN-NEXT:    v_add_u32_e32 v0, s1, v0
181; GCN-NEXT:    ; iglp_opt mask(0x00000001)
182; GCN-NEXT:    s_waitcnt lgkmcnt(0)
183; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[128:159], v2, v3, a[128:159]
184; GCN-NEXT:    ds_read_b128 a[124:127], v1 offset:24688
185; GCN-NEXT:    ds_read_b128 a[120:123], v1 offset:24672
186; GCN-NEXT:    ds_read_b128 a[116:119], v1 offset:24656
187; GCN-NEXT:    ds_read_b128 a[112:115], v1 offset:24640
188; GCN-NEXT:    ds_read_b128 a[108:111], v1 offset:24624
189; GCN-NEXT:    ds_read_b128 a[104:107], v1 offset:24608
190; GCN-NEXT:    ds_read_b128 a[100:103], v1 offset:24592
191; GCN-NEXT:    ds_read_b128 a[96:99], v1 offset:24576
192; GCN-NEXT:    s_waitcnt lgkmcnt(0)
193; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[96:127], v2, v3, a[96:127]
194; GCN-NEXT:    ds_read_b128 a[92:95], v1 offset:49264
195; GCN-NEXT:    ds_read_b128 a[88:91], v1 offset:49248
196; GCN-NEXT:    ds_read_b128 a[84:87], v1 offset:49232
197; GCN-NEXT:    ds_read_b128 a[80:83], v1 offset:49216
198; GCN-NEXT:    ds_read_b128 a[76:79], v1 offset:49200
199; GCN-NEXT:    ds_read_b128 a[72:75], v1 offset:49184
200; GCN-NEXT:    ds_read_b128 a[68:71], v1 offset:49168
201; GCN-NEXT:    ds_read_b128 a[64:67], v1 offset:49152
202; GCN-NEXT:    v_add_u32_e32 v1, 0x6000, v1
203; GCN-NEXT:    s_waitcnt lgkmcnt(0)
204; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[64:95], v2, v3, a[64:95]
205; GCN-NEXT:    ds_read_b128 a[60:63], v1 offset:57456
206; GCN-NEXT:    ds_read_b128 a[56:59], v1 offset:57440
207; GCN-NEXT:    ds_read_b128 a[52:55], v1 offset:57424
208; GCN-NEXT:    ds_read_b128 a[48:51], v1 offset:57408
209; GCN-NEXT:    ds_read_b128 a[32:35], v1 offset:57344
210; GCN-NEXT:    ds_read_b128 a[36:39], v1 offset:57360
211; GCN-NEXT:    ds_read_b128 a[40:43], v1 offset:57376
212; GCN-NEXT:    ds_read_b128 a[44:47], v1 offset:57392
213; GCN-NEXT:    s_waitcnt lgkmcnt(0)
214; GCN-NEXT:    v_mfma_f32_32x32x1f32 a[32:63], v2, v3, a[32:63]
215; GCN-NEXT:    ds_write_b128 v0, a[28:31] offset:112
216; GCN-NEXT:    ds_write_b128 v0, a[24:27] offset:96
217; GCN-NEXT:    ds_write_b128 v0, a[20:23] offset:80
218; GCN-NEXT:    ds_write_b128 v0, a[16:19] offset:64
219; GCN-NEXT:    ds_write_b128 v0, a[12:15] offset:48
220; GCN-NEXT:    ds_write_b128 v0, a[8:11] offset:32
221; GCN-NEXT:    ds_write_b128 v0, a[4:7] offset:16
222; GCN-NEXT:    ds_write_b128 v0, a[0:3]
223; GCN-NEXT:    v_mov_b32_e32 v0, s1
224; GCN-NEXT:    ds_write_b128 v0, a[152:155] offset:8288
225; GCN-NEXT:    ds_write_b128 v0, a[156:159] offset:8304
226; GCN-NEXT:    ds_write_b128 v0, a[144:147] offset:8256
227; GCN-NEXT:    ds_write_b128 v0, a[148:151] offset:8272
228; GCN-NEXT:    ds_write_b128 v0, a[136:139] offset:8224
229; GCN-NEXT:    ds_write_b128 v0, a[140:143] offset:8240
230; GCN-NEXT:    ds_write_b128 v0, a[128:131] offset:8192
231; GCN-NEXT:    ds_write_b128 v0, a[132:135] offset:8208
232; GCN-NEXT:    ds_write_b128 v0, a[120:123] offset:16480
233; GCN-NEXT:    ds_write_b128 v0, a[124:127] offset:16496
234; GCN-NEXT:    ds_write_b128 v0, a[112:115] offset:16448
235; GCN-NEXT:    ds_write_b128 v0, a[116:119] offset:16464
236; GCN-NEXT:    ds_write_b128 v0, a[104:107] offset:16416
237; GCN-NEXT:    ds_write_b128 v0, a[108:111] offset:16432
238; GCN-NEXT:    ds_write_b128 v0, a[96:99] offset:16384
239; GCN-NEXT:    ds_write_b128 v0, a[100:103] offset:16400
240; GCN-NEXT:    ds_write_b128 v0, a[88:91] offset:24672
241; GCN-NEXT:    ds_write_b128 v0, a[92:95] offset:24688
242; GCN-NEXT:    ds_write_b128 v0, a[80:83] offset:24640
243; GCN-NEXT:    ds_write_b128 v0, a[84:87] offset:24656
244; GCN-NEXT:    ds_write_b128 v0, a[72:75] offset:24608
245; GCN-NEXT:    ds_write_b128 v0, a[76:79] offset:24624
246; GCN-NEXT:    ds_write_b128 v0, a[64:67] offset:24576
247; GCN-NEXT:    ds_write_b128 v0, a[68:71] offset:24592
248; GCN-NEXT:    ds_write_b128 v0, a[56:59] offset:32864
249; GCN-NEXT:    ds_write_b128 v0, a[60:63] offset:32880
250; GCN-NEXT:    ds_write_b128 v0, a[48:51] offset:32832
251; GCN-NEXT:    ds_write_b128 v0, a[52:55] offset:32848
252; GCN-NEXT:    ds_write_b128 v0, a[40:43] offset:32800
253; GCN-NEXT:    ds_write_b128 v0, a[44:47] offset:32816
254; GCN-NEXT:    ds_write_b128 v0, a[32:35] offset:32768
255; GCN-NEXT:    ds_write_b128 v0, a[36:39] offset:32784
256; GCN-NEXT:    s_endpgm
257entry:
258  call void @llvm.amdgcn.iglp.opt(i32 1)
259  %idx = call i32 @llvm.amdgcn.workitem.id.x()
260  %load.0.addr = getelementptr <32 x float>, ptr addrspace(3) %in, i32 %idx
261  %load.0 = load <32 x float>, ptr addrspace(3) %load.0.addr
262  %load.1.addr = getelementptr <32 x float>, ptr addrspace(3) %load.0.addr, i32 64
263  %load.1 = load <32 x float>, ptr addrspace(3) %load.1.addr
264  %load.2.addr = getelementptr <32 x float>, ptr addrspace(3) %load.1.addr, i32 128
265  %load.2 = load <32 x float>, ptr addrspace(3) %load.2.addr
266  %load.3.addr = getelementptr <32 x float>, ptr addrspace(3) %load.2.addr, i32 192
267  %load.3 = load <32 x float>, ptr addrspace(3) %load.3.addr
268  %load.4.addr = getelementptr <32 x float>, ptr addrspace(3) %load.3.addr, i32 256
269  %load.4 = load <32 x float>, ptr addrspace(3) %load.4.addr
270  %mai.0 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.0, i32 0, i32 0, i32 0)
271  %mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.1, i32 0, i32 0, i32 0)
272  %mai.2 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.2, i32 0, i32 0, i32 0)
273  %mai.3 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.3, i32 0, i32 0, i32 0)
274  %mai.4 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %load.4, i32 0, i32 0, i32 0)
275  %store.0.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 %idx
276  store <32 x float> %mai.0, ptr addrspace(3) %store.0.addr
277  %store.1.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 64
278  store <32 x float> %mai.1, ptr addrspace(3) %store.1.addr
279  %store.2.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 128
280  store <32 x float> %mai.2, ptr addrspace(3) %store.2.addr
281  %store.3.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 192
282  store <32 x float> %mai.3, ptr addrspace(3) %store.3.addr
283  %store.4.addr = getelementptr <32 x float>, ptr addrspace(3) %out, i32 256
284  store <32 x float> %mai.4, ptr addrspace(3) %store.4.addr
285  ret void
286}
287
288define amdgpu_kernel void @test_iglp_opt_asm_sideeffect(ptr addrspace(3) noalias %in, ptr addrspace(3) noalias %out) #0 {
289; GCN-LABEL: test_iglp_opt_asm_sideeffect:
290; GCN:       ; %bb.0: ; %entry
291; GCN-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x24
292; GCN-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
293; GCN-NEXT:    v_and_b32_e32 v0, 0xffc, v0
294; GCN-NEXT:    ; iglp_opt mask(0x00000000)
295; GCN-NEXT:    s_waitcnt lgkmcnt(0)
296; GCN-NEXT:    v_add_u32_e32 v1, s0, v0
297; GCN-NEXT:    ds_read_b32 v1, v1
298; GCN-NEXT:    v_add_u32_e32 v0, s1, v0
299; GCN-NEXT:    v_mov_b32_e32 v2, s0
300; GCN-NEXT:    s_waitcnt lgkmcnt(0)
301; GCN-NEXT:    ds_write_b32 v0, v1
302; GCN-NEXT:    ;;#ASMSTART
303; GCN-NEXT:    ;;#ASMEND
304; GCN-NEXT:    ds_read_b32 v0, v2 offset:256
305; GCN-NEXT:    v_mov_b32_e32 v1, s1
306; GCN-NEXT:    s_waitcnt lgkmcnt(0)
307; GCN-NEXT:    ds_write_b32 v1, v0 offset:256
308; GCN-NEXT:    s_endpgm
309entry:
310  %idx = call i32 @llvm.amdgcn.workitem.id.x()
311  %load.0.addr = getelementptr float, ptr addrspace(3) %in, i32 %idx
312  %load.0 = load float, ptr addrspace(3) %load.0.addr
313  %store.0.addr = getelementptr float, ptr addrspace(3) %out, i32 %idx
314  store float %load.0, ptr addrspace(3) %store.0.addr
315  call void asm sideeffect "", ""() #1
316  call void @llvm.amdgcn.iglp.opt(i32 0) #1
317  %load.1.addr = getelementptr float, ptr addrspace(3) %in, i32 64
318  %load.1 = load float, ptr addrspace(3) %load.1.addr
319  %store.1.addr = getelementptr float, ptr addrspace(3) %out, i32 64
320  store float %load.1, ptr addrspace(3) %store.1.addr
321  ret void
322}
323
324declare void @llvm.amdgcn.iglp.opt(i32) #1
325declare i32 @llvm.amdgcn.workitem.id.x() #1
326declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32, i32, i32) #1
327
328attributes #0 = { nounwind "amdgpu-flat-work-group-size"="1,256" }
329attributes #1 = { convergent nounwind }
330