1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize64" -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX11,SDAG-GFX11 %s 3; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI,SDAG-VI %s 4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,SDAG-GFX9 %s 5 6; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize64" -verify-machineinstrs < %s 2>%t | FileCheck -check-prefixes=GCN,GFX11,GISEL-GFX11 %s 7; RUN: FileCheck --check-prefix=ERR %s < %t 8; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s 2>%t | FileCheck -check-prefixes=GCN,VI,GISEL-VI %s 9; RUN: FileCheck --check-prefix=ERR %s < %t 10; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s 2>%t | FileCheck -check-prefixes=GCN,GFX9,GISEL-GFX9 %s 11; RUN: FileCheck --check-prefix=ERR %s < %t 12 13; Note: GlobalISel abort is disabled so we don't crash on i1 inputs. 14; They are allowed in DAGISel but we (intentionally) don't support them 15; in GlobalISel. 16 17; ERR: warning: Instruction selection used fallback path for v_icmp_i1_ne0 18 19declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #0 20declare i64 @llvm.amdgcn.icmp.i64(i64, i64, i32) #0 21declare i64 @llvm.amdgcn.icmp.i16(i16, i16, i32) #0 22declare i64 @llvm.amdgcn.icmp.i1(i1, i1, i32) #0 23 24define amdgpu_kernel void @v_icmp_i32_eq(ptr addrspace(1) %out, i32 %src) { 25; GFX11-LABEL: v_icmp_i32_eq: 26; GFX11: ; %bb.0: 27; GFX11-NEXT: s_clause 0x1 28; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 29; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 30; GFX11-NEXT: v_mov_b32_e32 v2, 0 31; GFX11-NEXT: s_waitcnt lgkmcnt(0) 32; GFX11-NEXT: v_cmp_eq_u32_e64 s[2:3], 0x64, s2 33; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 34; GFX11-NEXT: v_mov_b32_e32 v0, s2 35; GFX11-NEXT: v_mov_b32_e32 v1, s3 36; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 37; GFX11-NEXT: s_endpgm 38; 39; SDAG-VI-LABEL: v_icmp_i32_eq: 40; SDAG-VI: ; %bb.0: 41; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 42; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 43; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 44; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 45; SDAG-VI-NEXT: v_cmp_eq_u32_e64 s[2:3], s2, v0 46; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 47; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 48; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 49; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 50; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 51; SDAG-VI-NEXT: s_endpgm 52; 53; GFX9-LABEL: v_icmp_i32_eq: 54; GFX9: ; %bb.0: 55; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 56; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 57; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 58; GFX9-NEXT: v_mov_b32_e32 v2, 0 59; GFX9-NEXT: s_waitcnt lgkmcnt(0) 60; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], s2, v0 61; GFX9-NEXT: v_mov_b32_e32 v0, s2 62; GFX9-NEXT: v_mov_b32_e32 v1, s3 63; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 64; GFX9-NEXT: s_endpgm 65; 66; GISEL-VI-LABEL: v_icmp_i32_eq: 67; GISEL-VI: ; %bb.0: 68; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 69; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 70; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 71; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 72; GISEL-VI-NEXT: v_cmp_eq_u32_e64 s[2:3], s2, v0 73; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 74; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 75; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 76; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 77; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 78; GISEL-VI-NEXT: s_endpgm 79 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 32) 80 store i64 %result, ptr addrspace(1) %out 81 ret void 82} 83 84define amdgpu_kernel void @v_icmp_i32(ptr addrspace(1) %out, i32 %src) { 85; SDAG-GFX11-LABEL: v_icmp_i32: 86; SDAG-GFX11: ; %bb.0: 87; SDAG-GFX11-NEXT: s_endpgm 88; 89; SDAG-VI-LABEL: v_icmp_i32: 90; SDAG-VI: ; %bb.0: 91; SDAG-VI-NEXT: s_endpgm 92; 93; SDAG-GFX9-LABEL: v_icmp_i32: 94; SDAG-GFX9: ; %bb.0: 95; SDAG-GFX9-NEXT: s_endpgm 96; 97; GISEL-GFX11-LABEL: v_icmp_i32: 98; GISEL-GFX11: ; %bb.0: 99; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 100; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0 101; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 102; GISEL-GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1] 103; GISEL-GFX11-NEXT: s_endpgm 104; 105; GISEL-VI-LABEL: v_icmp_i32: 106; GISEL-VI: ; %bb.0: 107; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 108; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 109; GISEL-VI-NEXT: v_mov_b32_e32 v0, s0 110; GISEL-VI-NEXT: v_mov_b32_e32 v1, s1 111; GISEL-VI-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 112; GISEL-VI-NEXT: s_endpgm 113; 114; GISEL-GFX9-LABEL: v_icmp_i32: 115; GISEL-GFX9: ; %bb.0: 116; GISEL-GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 117; GISEL-GFX9-NEXT: v_mov_b32_e32 v0, 0 118; GISEL-GFX9-NEXT: s_waitcnt lgkmcnt(0) 119; GISEL-GFX9-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1] 120; GISEL-GFX9-NEXT: s_endpgm 121 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 30) 122 store i64 %result, ptr addrspace(1) %out 123 ret void 124} 125 126define amdgpu_kernel void @v_icmp_i32_ne(ptr addrspace(1) %out, i32 %src) { 127; GFX11-LABEL: v_icmp_i32_ne: 128; GFX11: ; %bb.0: 129; GFX11-NEXT: s_clause 0x1 130; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 131; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 132; GFX11-NEXT: v_mov_b32_e32 v2, 0 133; GFX11-NEXT: s_waitcnt lgkmcnt(0) 134; GFX11-NEXT: v_cmp_ne_u32_e64 s[2:3], 0x64, s2 135; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 136; GFX11-NEXT: v_mov_b32_e32 v0, s2 137; GFX11-NEXT: v_mov_b32_e32 v1, s3 138; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 139; GFX11-NEXT: s_endpgm 140; 141; SDAG-VI-LABEL: v_icmp_i32_ne: 142; SDAG-VI: ; %bb.0: 143; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 144; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 145; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 146; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 147; SDAG-VI-NEXT: v_cmp_ne_u32_e64 s[2:3], s2, v0 148; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 149; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 150; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 151; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 152; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 153; SDAG-VI-NEXT: s_endpgm 154; 155; GFX9-LABEL: v_icmp_i32_ne: 156; GFX9: ; %bb.0: 157; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 158; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 159; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 160; GFX9-NEXT: v_mov_b32_e32 v2, 0 161; GFX9-NEXT: s_waitcnt lgkmcnt(0) 162; GFX9-NEXT: v_cmp_ne_u32_e64 s[2:3], s2, v0 163; GFX9-NEXT: v_mov_b32_e32 v0, s2 164; GFX9-NEXT: v_mov_b32_e32 v1, s3 165; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 166; GFX9-NEXT: s_endpgm 167; 168; GISEL-VI-LABEL: v_icmp_i32_ne: 169; GISEL-VI: ; %bb.0: 170; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 171; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 172; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 173; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 174; GISEL-VI-NEXT: v_cmp_ne_u32_e64 s[2:3], s2, v0 175; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 176; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 177; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 178; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 179; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 180; GISEL-VI-NEXT: s_endpgm 181 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 33) 182 store i64 %result, ptr addrspace(1) %out 183 ret void 184} 185 186define amdgpu_kernel void @v_icmp_i32_ugt(ptr addrspace(1) %out, i32 %src) { 187; GFX11-LABEL: v_icmp_i32_ugt: 188; GFX11: ; %bb.0: 189; GFX11-NEXT: s_clause 0x1 190; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 191; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 192; GFX11-NEXT: v_mov_b32_e32 v2, 0 193; GFX11-NEXT: s_waitcnt lgkmcnt(0) 194; GFX11-NEXT: v_cmp_lt_u32_e64 s[2:3], 0x64, s2 195; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 196; GFX11-NEXT: v_mov_b32_e32 v0, s2 197; GFX11-NEXT: v_mov_b32_e32 v1, s3 198; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 199; GFX11-NEXT: s_endpgm 200; 201; SDAG-VI-LABEL: v_icmp_i32_ugt: 202; SDAG-VI: ; %bb.0: 203; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 204; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 205; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 206; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 207; SDAG-VI-NEXT: v_cmp_gt_u32_e64 s[2:3], s2, v0 208; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 209; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 210; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 211; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 212; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 213; SDAG-VI-NEXT: s_endpgm 214; 215; GFX9-LABEL: v_icmp_i32_ugt: 216; GFX9: ; %bb.0: 217; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 218; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 219; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 220; GFX9-NEXT: v_mov_b32_e32 v2, 0 221; GFX9-NEXT: s_waitcnt lgkmcnt(0) 222; GFX9-NEXT: v_cmp_gt_u32_e64 s[2:3], s2, v0 223; GFX9-NEXT: v_mov_b32_e32 v0, s2 224; GFX9-NEXT: v_mov_b32_e32 v1, s3 225; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 226; GFX9-NEXT: s_endpgm 227; 228; GISEL-VI-LABEL: v_icmp_i32_ugt: 229; GISEL-VI: ; %bb.0: 230; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 231; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 232; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 233; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 234; GISEL-VI-NEXT: v_cmp_gt_u32_e64 s[2:3], s2, v0 235; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 236; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 237; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 238; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 239; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 240; GISEL-VI-NEXT: s_endpgm 241 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 34) 242 store i64 %result, ptr addrspace(1) %out 243 ret void 244} 245 246define amdgpu_kernel void @v_icmp_i32_uge(ptr addrspace(1) %out, i32 %src) { 247; GFX11-LABEL: v_icmp_i32_uge: 248; GFX11: ; %bb.0: 249; GFX11-NEXT: s_clause 0x1 250; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 251; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 252; GFX11-NEXT: v_mov_b32_e32 v2, 0 253; GFX11-NEXT: s_waitcnt lgkmcnt(0) 254; GFX11-NEXT: v_cmp_le_u32_e64 s[2:3], 0x64, s2 255; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 256; GFX11-NEXT: v_mov_b32_e32 v0, s2 257; GFX11-NEXT: v_mov_b32_e32 v1, s3 258; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 259; GFX11-NEXT: s_endpgm 260; 261; SDAG-VI-LABEL: v_icmp_i32_uge: 262; SDAG-VI: ; %bb.0: 263; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 264; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 265; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 266; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 267; SDAG-VI-NEXT: v_cmp_ge_u32_e64 s[2:3], s2, v0 268; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 269; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 270; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 271; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 272; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 273; SDAG-VI-NEXT: s_endpgm 274; 275; GFX9-LABEL: v_icmp_i32_uge: 276; GFX9: ; %bb.0: 277; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 278; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 279; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 280; GFX9-NEXT: v_mov_b32_e32 v2, 0 281; GFX9-NEXT: s_waitcnt lgkmcnt(0) 282; GFX9-NEXT: v_cmp_ge_u32_e64 s[2:3], s2, v0 283; GFX9-NEXT: v_mov_b32_e32 v0, s2 284; GFX9-NEXT: v_mov_b32_e32 v1, s3 285; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 286; GFX9-NEXT: s_endpgm 287; 288; GISEL-VI-LABEL: v_icmp_i32_uge: 289; GISEL-VI: ; %bb.0: 290; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 291; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 292; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 293; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 294; GISEL-VI-NEXT: v_cmp_ge_u32_e64 s[2:3], s2, v0 295; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 296; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 297; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 298; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 299; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 300; GISEL-VI-NEXT: s_endpgm 301 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 35) 302 store i64 %result, ptr addrspace(1) %out 303 ret void 304} 305 306define amdgpu_kernel void @v_icmp_i32_ult(ptr addrspace(1) %out, i32 %src) { 307; GFX11-LABEL: v_icmp_i32_ult: 308; GFX11: ; %bb.0: 309; GFX11-NEXT: s_clause 0x1 310; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 311; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 312; GFX11-NEXT: v_mov_b32_e32 v2, 0 313; GFX11-NEXT: s_waitcnt lgkmcnt(0) 314; GFX11-NEXT: v_cmp_gt_u32_e64 s[2:3], 0x64, s2 315; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 316; GFX11-NEXT: v_mov_b32_e32 v0, s2 317; GFX11-NEXT: v_mov_b32_e32 v1, s3 318; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 319; GFX11-NEXT: s_endpgm 320; 321; SDAG-VI-LABEL: v_icmp_i32_ult: 322; SDAG-VI: ; %bb.0: 323; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 324; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 325; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 326; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 327; SDAG-VI-NEXT: v_cmp_lt_u32_e64 s[2:3], s2, v0 328; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 329; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 330; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 331; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 332; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 333; SDAG-VI-NEXT: s_endpgm 334; 335; GFX9-LABEL: v_icmp_i32_ult: 336; GFX9: ; %bb.0: 337; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 338; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 339; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 340; GFX9-NEXT: v_mov_b32_e32 v2, 0 341; GFX9-NEXT: s_waitcnt lgkmcnt(0) 342; GFX9-NEXT: v_cmp_lt_u32_e64 s[2:3], s2, v0 343; GFX9-NEXT: v_mov_b32_e32 v0, s2 344; GFX9-NEXT: v_mov_b32_e32 v1, s3 345; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 346; GFX9-NEXT: s_endpgm 347; 348; GISEL-VI-LABEL: v_icmp_i32_ult: 349; GISEL-VI: ; %bb.0: 350; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 351; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 352; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 353; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 354; GISEL-VI-NEXT: v_cmp_lt_u32_e64 s[2:3], s2, v0 355; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 356; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 357; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 358; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 359; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 360; GISEL-VI-NEXT: s_endpgm 361 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 36) 362 store i64 %result, ptr addrspace(1) %out 363 ret void 364} 365 366define amdgpu_kernel void @v_icmp_i32_ule(ptr addrspace(1) %out, i32 %src) { 367; GFX11-LABEL: v_icmp_i32_ule: 368; GFX11: ; %bb.0: 369; GFX11-NEXT: s_clause 0x1 370; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 371; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 372; GFX11-NEXT: v_mov_b32_e32 v2, 0 373; GFX11-NEXT: s_waitcnt lgkmcnt(0) 374; GFX11-NEXT: v_cmp_ge_u32_e64 s[2:3], 0x64, s2 375; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 376; GFX11-NEXT: v_mov_b32_e32 v0, s2 377; GFX11-NEXT: v_mov_b32_e32 v1, s3 378; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 379; GFX11-NEXT: s_endpgm 380; 381; SDAG-VI-LABEL: v_icmp_i32_ule: 382; SDAG-VI: ; %bb.0: 383; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 384; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 385; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 386; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 387; SDAG-VI-NEXT: v_cmp_le_u32_e64 s[2:3], s2, v0 388; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 389; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 390; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 391; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 392; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 393; SDAG-VI-NEXT: s_endpgm 394; 395; GFX9-LABEL: v_icmp_i32_ule: 396; GFX9: ; %bb.0: 397; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 398; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 399; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 400; GFX9-NEXT: v_mov_b32_e32 v2, 0 401; GFX9-NEXT: s_waitcnt lgkmcnt(0) 402; GFX9-NEXT: v_cmp_le_u32_e64 s[2:3], s2, v0 403; GFX9-NEXT: v_mov_b32_e32 v0, s2 404; GFX9-NEXT: v_mov_b32_e32 v1, s3 405; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 406; GFX9-NEXT: s_endpgm 407; 408; GISEL-VI-LABEL: v_icmp_i32_ule: 409; GISEL-VI: ; %bb.0: 410; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 411; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 412; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 413; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 414; GISEL-VI-NEXT: v_cmp_le_u32_e64 s[2:3], s2, v0 415; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 416; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 417; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 418; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 419; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 420; GISEL-VI-NEXT: s_endpgm 421 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 37) 422 store i64 %result, ptr addrspace(1) %out 423 ret void 424} 425 426define amdgpu_kernel void @v_icmp_i32_sgt(ptr addrspace(1) %out, i32 %src) #1 { 427; GFX11-LABEL: v_icmp_i32_sgt: 428; GFX11: ; %bb.0: 429; GFX11-NEXT: s_clause 0x1 430; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 431; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 432; GFX11-NEXT: v_mov_b32_e32 v2, 0 433; GFX11-NEXT: s_waitcnt lgkmcnt(0) 434; GFX11-NEXT: v_cmp_lt_i32_e64 s[2:3], 0x64, s2 435; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 436; GFX11-NEXT: v_mov_b32_e32 v0, s2 437; GFX11-NEXT: v_mov_b32_e32 v1, s3 438; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 439; GFX11-NEXT: s_endpgm 440; 441; SDAG-VI-LABEL: v_icmp_i32_sgt: 442; SDAG-VI: ; %bb.0: 443; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 444; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 445; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 446; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 447; SDAG-VI-NEXT: v_cmp_gt_i32_e64 s[2:3], s2, v0 448; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 449; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 450; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 451; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 452; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 453; SDAG-VI-NEXT: s_endpgm 454; 455; GFX9-LABEL: v_icmp_i32_sgt: 456; GFX9: ; %bb.0: 457; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 458; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 459; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 460; GFX9-NEXT: v_mov_b32_e32 v2, 0 461; GFX9-NEXT: s_waitcnt lgkmcnt(0) 462; GFX9-NEXT: v_cmp_gt_i32_e64 s[2:3], s2, v0 463; GFX9-NEXT: v_mov_b32_e32 v0, s2 464; GFX9-NEXT: v_mov_b32_e32 v1, s3 465; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 466; GFX9-NEXT: s_endpgm 467; 468; GISEL-VI-LABEL: v_icmp_i32_sgt: 469; GISEL-VI: ; %bb.0: 470; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 471; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 472; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 473; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 474; GISEL-VI-NEXT: v_cmp_gt_i32_e64 s[2:3], s2, v0 475; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 476; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 477; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 478; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 479; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 480; GISEL-VI-NEXT: s_endpgm 481 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 38) 482 store i64 %result, ptr addrspace(1) %out 483 ret void 484} 485 486define amdgpu_kernel void @v_icmp_i32_sge(ptr addrspace(1) %out, i32 %src) { 487; GFX11-LABEL: v_icmp_i32_sge: 488; GFX11: ; %bb.0: 489; GFX11-NEXT: s_clause 0x1 490; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 491; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 492; GFX11-NEXT: v_mov_b32_e32 v2, 0 493; GFX11-NEXT: s_waitcnt lgkmcnt(0) 494; GFX11-NEXT: v_cmp_le_i32_e64 s[2:3], 0x64, s2 495; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 496; GFX11-NEXT: v_mov_b32_e32 v0, s2 497; GFX11-NEXT: v_mov_b32_e32 v1, s3 498; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 499; GFX11-NEXT: s_endpgm 500; 501; SDAG-VI-LABEL: v_icmp_i32_sge: 502; SDAG-VI: ; %bb.0: 503; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 504; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 505; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 506; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 507; SDAG-VI-NEXT: v_cmp_ge_i32_e64 s[2:3], s2, v0 508; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 509; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 510; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 511; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 512; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 513; SDAG-VI-NEXT: s_endpgm 514; 515; GFX9-LABEL: v_icmp_i32_sge: 516; GFX9: ; %bb.0: 517; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 518; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 519; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 520; GFX9-NEXT: v_mov_b32_e32 v2, 0 521; GFX9-NEXT: s_waitcnt lgkmcnt(0) 522; GFX9-NEXT: v_cmp_ge_i32_e64 s[2:3], s2, v0 523; GFX9-NEXT: v_mov_b32_e32 v0, s2 524; GFX9-NEXT: v_mov_b32_e32 v1, s3 525; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 526; GFX9-NEXT: s_endpgm 527; 528; GISEL-VI-LABEL: v_icmp_i32_sge: 529; GISEL-VI: ; %bb.0: 530; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 531; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 532; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 533; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 534; GISEL-VI-NEXT: v_cmp_ge_i32_e64 s[2:3], s2, v0 535; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 536; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 537; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 538; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 539; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 540; GISEL-VI-NEXT: s_endpgm 541 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 39) 542 store i64 %result, ptr addrspace(1) %out 543 ret void 544} 545 546define amdgpu_kernel void @v_icmp_i32_slt(ptr addrspace(1) %out, i32 %src) { 547; GFX11-LABEL: v_icmp_i32_slt: 548; GFX11: ; %bb.0: 549; GFX11-NEXT: s_clause 0x1 550; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 551; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 552; GFX11-NEXT: v_mov_b32_e32 v2, 0 553; GFX11-NEXT: s_waitcnt lgkmcnt(0) 554; GFX11-NEXT: v_cmp_gt_i32_e64 s[2:3], 0x64, s2 555; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 556; GFX11-NEXT: v_mov_b32_e32 v0, s2 557; GFX11-NEXT: v_mov_b32_e32 v1, s3 558; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 559; GFX11-NEXT: s_endpgm 560; 561; SDAG-VI-LABEL: v_icmp_i32_slt: 562; SDAG-VI: ; %bb.0: 563; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 564; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 565; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 566; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 567; SDAG-VI-NEXT: v_cmp_lt_i32_e64 s[2:3], s2, v0 568; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 569; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 570; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 571; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 572; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 573; SDAG-VI-NEXT: s_endpgm 574; 575; GFX9-LABEL: v_icmp_i32_slt: 576; GFX9: ; %bb.0: 577; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 578; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 579; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 580; GFX9-NEXT: v_mov_b32_e32 v2, 0 581; GFX9-NEXT: s_waitcnt lgkmcnt(0) 582; GFX9-NEXT: v_cmp_lt_i32_e64 s[2:3], s2, v0 583; GFX9-NEXT: v_mov_b32_e32 v0, s2 584; GFX9-NEXT: v_mov_b32_e32 v1, s3 585; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 586; GFX9-NEXT: s_endpgm 587; 588; GISEL-VI-LABEL: v_icmp_i32_slt: 589; GISEL-VI: ; %bb.0: 590; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 591; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 592; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 593; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 594; GISEL-VI-NEXT: v_cmp_lt_i32_e64 s[2:3], s2, v0 595; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 596; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 597; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 598; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 599; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 600; GISEL-VI-NEXT: s_endpgm 601 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 40) 602 store i64 %result, ptr addrspace(1) %out 603 ret void 604} 605 606define amdgpu_kernel void @v_icmp_i32_sle(ptr addrspace(1) %out, i32 %src) { 607; GFX11-LABEL: v_icmp_i32_sle: 608; GFX11: ; %bb.0: 609; GFX11-NEXT: s_clause 0x1 610; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 611; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 612; GFX11-NEXT: v_mov_b32_e32 v2, 0 613; GFX11-NEXT: s_waitcnt lgkmcnt(0) 614; GFX11-NEXT: v_cmp_ge_i32_e64 s[2:3], 0x64, s2 615; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 616; GFX11-NEXT: v_mov_b32_e32 v0, s2 617; GFX11-NEXT: v_mov_b32_e32 v1, s3 618; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 619; GFX11-NEXT: s_endpgm 620; 621; SDAG-VI-LABEL: v_icmp_i32_sle: 622; SDAG-VI: ; %bb.0: 623; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 624; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 625; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 626; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 627; SDAG-VI-NEXT: v_cmp_le_i32_e64 s[2:3], s2, v0 628; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 629; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 630; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 631; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 632; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 633; SDAG-VI-NEXT: s_endpgm 634; 635; GFX9-LABEL: v_icmp_i32_sle: 636; GFX9: ; %bb.0: 637; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 638; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 639; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 640; GFX9-NEXT: v_mov_b32_e32 v2, 0 641; GFX9-NEXT: s_waitcnt lgkmcnt(0) 642; GFX9-NEXT: v_cmp_le_i32_e64 s[2:3], s2, v0 643; GFX9-NEXT: v_mov_b32_e32 v0, s2 644; GFX9-NEXT: v_mov_b32_e32 v1, s3 645; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 646; GFX9-NEXT: s_endpgm 647; 648; GISEL-VI-LABEL: v_icmp_i32_sle: 649; GISEL-VI: ; %bb.0: 650; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 651; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 652; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 653; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 654; GISEL-VI-NEXT: v_cmp_le_i32_e64 s[2:3], s2, v0 655; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 656; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 657; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 658; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 659; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 660; GISEL-VI-NEXT: s_endpgm 661 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 41) 662 store i64 %result, ptr addrspace(1) %out 663 ret void 664} 665 666define amdgpu_kernel void @v_icmp_i64_eq(ptr addrspace(1) %out, i64 %src) { 667; GFX11-LABEL: v_icmp_i64_eq: 668; GFX11: ; %bb.0: 669; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 670; GFX11-NEXT: v_mov_b32_e32 v2, 0 671; GFX11-NEXT: s_waitcnt lgkmcnt(0) 672; GFX11-NEXT: v_cmp_eq_u64_e64 s[2:3], 0x64, s[2:3] 673; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 674; GFX11-NEXT: v_mov_b32_e32 v0, s2 675; GFX11-NEXT: v_mov_b32_e32 v1, s3 676; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 677; GFX11-NEXT: s_endpgm 678; 679; SDAG-VI-LABEL: v_icmp_i64_eq: 680; SDAG-VI: ; %bb.0: 681; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 682; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 683; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 684; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 685; SDAG-VI-NEXT: v_cmp_eq_u64_e64 s[2:3], s[2:3], v[0:1] 686; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 687; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 688; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 689; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 690; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 691; SDAG-VI-NEXT: s_endpgm 692; 693; GFX9-LABEL: v_icmp_i64_eq: 694; GFX9: ; %bb.0: 695; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 696; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 697; GFX9-NEXT: v_mov_b32_e32 v1, 0 698; GFX9-NEXT: v_mov_b32_e32 v2, 0 699; GFX9-NEXT: s_waitcnt lgkmcnt(0) 700; GFX9-NEXT: v_cmp_eq_u64_e64 s[2:3], s[2:3], v[0:1] 701; GFX9-NEXT: v_mov_b32_e32 v0, s2 702; GFX9-NEXT: v_mov_b32_e32 v1, s3 703; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 704; GFX9-NEXT: s_endpgm 705; 706; GISEL-VI-LABEL: v_icmp_i64_eq: 707; GISEL-VI: ; %bb.0: 708; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 709; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 710; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 711; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 712; GISEL-VI-NEXT: v_cmp_eq_u64_e64 s[2:3], s[2:3], v[0:1] 713; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 714; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 715; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 716; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 717; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 718; GISEL-VI-NEXT: s_endpgm 719 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 32) 720 store i64 %result, ptr addrspace(1) %out 721 ret void 722} 723 724define amdgpu_kernel void @v_icmp_i64_ne(ptr addrspace(1) %out, i64 %src) { 725; GFX11-LABEL: v_icmp_i64_ne: 726; GFX11: ; %bb.0: 727; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 728; GFX11-NEXT: v_mov_b32_e32 v2, 0 729; GFX11-NEXT: s_waitcnt lgkmcnt(0) 730; GFX11-NEXT: v_cmp_ne_u64_e64 s[2:3], 0x64, s[2:3] 731; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 732; GFX11-NEXT: v_mov_b32_e32 v0, s2 733; GFX11-NEXT: v_mov_b32_e32 v1, s3 734; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 735; GFX11-NEXT: s_endpgm 736; 737; SDAG-VI-LABEL: v_icmp_i64_ne: 738; SDAG-VI: ; %bb.0: 739; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 740; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 741; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 742; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 743; SDAG-VI-NEXT: v_cmp_ne_u64_e64 s[2:3], s[2:3], v[0:1] 744; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 745; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 746; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 747; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 748; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 749; SDAG-VI-NEXT: s_endpgm 750; 751; GFX9-LABEL: v_icmp_i64_ne: 752; GFX9: ; %bb.0: 753; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 754; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 755; GFX9-NEXT: v_mov_b32_e32 v1, 0 756; GFX9-NEXT: v_mov_b32_e32 v2, 0 757; GFX9-NEXT: s_waitcnt lgkmcnt(0) 758; GFX9-NEXT: v_cmp_ne_u64_e64 s[2:3], s[2:3], v[0:1] 759; GFX9-NEXT: v_mov_b32_e32 v0, s2 760; GFX9-NEXT: v_mov_b32_e32 v1, s3 761; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 762; GFX9-NEXT: s_endpgm 763; 764; GISEL-VI-LABEL: v_icmp_i64_ne: 765; GISEL-VI: ; %bb.0: 766; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 767; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 768; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 769; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 770; GISEL-VI-NEXT: v_cmp_ne_u64_e64 s[2:3], s[2:3], v[0:1] 771; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 772; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 773; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 774; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 775; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 776; GISEL-VI-NEXT: s_endpgm 777 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 33) 778 store i64 %result, ptr addrspace(1) %out 779 ret void 780} 781 782define amdgpu_kernel void @v_icmp_u64_ugt(ptr addrspace(1) %out, i64 %src) { 783; GFX11-LABEL: v_icmp_u64_ugt: 784; GFX11: ; %bb.0: 785; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 786; GFX11-NEXT: v_mov_b32_e32 v2, 0 787; GFX11-NEXT: s_waitcnt lgkmcnt(0) 788; GFX11-NEXT: v_cmp_lt_u64_e64 s[2:3], 0x64, s[2:3] 789; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 790; GFX11-NEXT: v_mov_b32_e32 v0, s2 791; GFX11-NEXT: v_mov_b32_e32 v1, s3 792; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 793; GFX11-NEXT: s_endpgm 794; 795; SDAG-VI-LABEL: v_icmp_u64_ugt: 796; SDAG-VI: ; %bb.0: 797; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 798; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 799; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 800; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 801; SDAG-VI-NEXT: v_cmp_gt_u64_e64 s[2:3], s[2:3], v[0:1] 802; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 803; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 804; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 805; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 806; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 807; SDAG-VI-NEXT: s_endpgm 808; 809; GFX9-LABEL: v_icmp_u64_ugt: 810; GFX9: ; %bb.0: 811; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 812; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 813; GFX9-NEXT: v_mov_b32_e32 v1, 0 814; GFX9-NEXT: v_mov_b32_e32 v2, 0 815; GFX9-NEXT: s_waitcnt lgkmcnt(0) 816; GFX9-NEXT: v_cmp_gt_u64_e64 s[2:3], s[2:3], v[0:1] 817; GFX9-NEXT: v_mov_b32_e32 v0, s2 818; GFX9-NEXT: v_mov_b32_e32 v1, s3 819; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 820; GFX9-NEXT: s_endpgm 821; 822; GISEL-VI-LABEL: v_icmp_u64_ugt: 823; GISEL-VI: ; %bb.0: 824; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 825; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 826; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 827; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 828; GISEL-VI-NEXT: v_cmp_gt_u64_e64 s[2:3], s[2:3], v[0:1] 829; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 830; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 831; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 832; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 833; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 834; GISEL-VI-NEXT: s_endpgm 835 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 34) 836 store i64 %result, ptr addrspace(1) %out 837 ret void 838} 839 840define amdgpu_kernel void @v_icmp_u64_uge(ptr addrspace(1) %out, i64 %src) { 841; GFX11-LABEL: v_icmp_u64_uge: 842; GFX11: ; %bb.0: 843; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 844; GFX11-NEXT: v_mov_b32_e32 v2, 0 845; GFX11-NEXT: s_waitcnt lgkmcnt(0) 846; GFX11-NEXT: v_cmp_le_u64_e64 s[2:3], 0x64, s[2:3] 847; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 848; GFX11-NEXT: v_mov_b32_e32 v0, s2 849; GFX11-NEXT: v_mov_b32_e32 v1, s3 850; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 851; GFX11-NEXT: s_endpgm 852; 853; SDAG-VI-LABEL: v_icmp_u64_uge: 854; SDAG-VI: ; %bb.0: 855; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 856; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 857; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 858; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 859; SDAG-VI-NEXT: v_cmp_ge_u64_e64 s[2:3], s[2:3], v[0:1] 860; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 861; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 862; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 863; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 864; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 865; SDAG-VI-NEXT: s_endpgm 866; 867; GFX9-LABEL: v_icmp_u64_uge: 868; GFX9: ; %bb.0: 869; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 870; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 871; GFX9-NEXT: v_mov_b32_e32 v1, 0 872; GFX9-NEXT: v_mov_b32_e32 v2, 0 873; GFX9-NEXT: s_waitcnt lgkmcnt(0) 874; GFX9-NEXT: v_cmp_ge_u64_e64 s[2:3], s[2:3], v[0:1] 875; GFX9-NEXT: v_mov_b32_e32 v0, s2 876; GFX9-NEXT: v_mov_b32_e32 v1, s3 877; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 878; GFX9-NEXT: s_endpgm 879; 880; GISEL-VI-LABEL: v_icmp_u64_uge: 881; GISEL-VI: ; %bb.0: 882; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 883; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 884; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 885; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 886; GISEL-VI-NEXT: v_cmp_ge_u64_e64 s[2:3], s[2:3], v[0:1] 887; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 888; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 889; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 890; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 891; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 892; GISEL-VI-NEXT: s_endpgm 893 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 35) 894 store i64 %result, ptr addrspace(1) %out 895 ret void 896} 897 898define amdgpu_kernel void @v_icmp_u64_ult(ptr addrspace(1) %out, i64 %src) { 899; GFX11-LABEL: v_icmp_u64_ult: 900; GFX11: ; %bb.0: 901; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 902; GFX11-NEXT: v_mov_b32_e32 v2, 0 903; GFX11-NEXT: s_waitcnt lgkmcnt(0) 904; GFX11-NEXT: v_cmp_gt_u64_e64 s[2:3], 0x64, s[2:3] 905; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 906; GFX11-NEXT: v_mov_b32_e32 v0, s2 907; GFX11-NEXT: v_mov_b32_e32 v1, s3 908; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 909; GFX11-NEXT: s_endpgm 910; 911; SDAG-VI-LABEL: v_icmp_u64_ult: 912; SDAG-VI: ; %bb.0: 913; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 914; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 915; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 916; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 917; SDAG-VI-NEXT: v_cmp_lt_u64_e64 s[2:3], s[2:3], v[0:1] 918; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 919; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 920; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 921; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 922; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 923; SDAG-VI-NEXT: s_endpgm 924; 925; GFX9-LABEL: v_icmp_u64_ult: 926; GFX9: ; %bb.0: 927; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 928; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 929; GFX9-NEXT: v_mov_b32_e32 v1, 0 930; GFX9-NEXT: v_mov_b32_e32 v2, 0 931; GFX9-NEXT: s_waitcnt lgkmcnt(0) 932; GFX9-NEXT: v_cmp_lt_u64_e64 s[2:3], s[2:3], v[0:1] 933; GFX9-NEXT: v_mov_b32_e32 v0, s2 934; GFX9-NEXT: v_mov_b32_e32 v1, s3 935; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 936; GFX9-NEXT: s_endpgm 937; 938; GISEL-VI-LABEL: v_icmp_u64_ult: 939; GISEL-VI: ; %bb.0: 940; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 941; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 942; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 943; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 944; GISEL-VI-NEXT: v_cmp_lt_u64_e64 s[2:3], s[2:3], v[0:1] 945; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 946; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 947; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 948; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 949; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 950; GISEL-VI-NEXT: s_endpgm 951 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 36) 952 store i64 %result, ptr addrspace(1) %out 953 ret void 954} 955 956define amdgpu_kernel void @v_icmp_u64_ule(ptr addrspace(1) %out, i64 %src) { 957; GFX11-LABEL: v_icmp_u64_ule: 958; GFX11: ; %bb.0: 959; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 960; GFX11-NEXT: v_mov_b32_e32 v2, 0 961; GFX11-NEXT: s_waitcnt lgkmcnt(0) 962; GFX11-NEXT: v_cmp_ge_u64_e64 s[2:3], 0x64, s[2:3] 963; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 964; GFX11-NEXT: v_mov_b32_e32 v0, s2 965; GFX11-NEXT: v_mov_b32_e32 v1, s3 966; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 967; GFX11-NEXT: s_endpgm 968; 969; SDAG-VI-LABEL: v_icmp_u64_ule: 970; SDAG-VI: ; %bb.0: 971; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 972; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 973; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 974; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 975; SDAG-VI-NEXT: v_cmp_le_u64_e64 s[2:3], s[2:3], v[0:1] 976; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 977; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 978; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 979; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 980; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 981; SDAG-VI-NEXT: s_endpgm 982; 983; GFX9-LABEL: v_icmp_u64_ule: 984; GFX9: ; %bb.0: 985; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 986; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 987; GFX9-NEXT: v_mov_b32_e32 v1, 0 988; GFX9-NEXT: v_mov_b32_e32 v2, 0 989; GFX9-NEXT: s_waitcnt lgkmcnt(0) 990; GFX9-NEXT: v_cmp_le_u64_e64 s[2:3], s[2:3], v[0:1] 991; GFX9-NEXT: v_mov_b32_e32 v0, s2 992; GFX9-NEXT: v_mov_b32_e32 v1, s3 993; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 994; GFX9-NEXT: s_endpgm 995; 996; GISEL-VI-LABEL: v_icmp_u64_ule: 997; GISEL-VI: ; %bb.0: 998; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 999; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1000; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 1001; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1002; GISEL-VI-NEXT: v_cmp_le_u64_e64 s[2:3], s[2:3], v[0:1] 1003; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1004; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1005; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1006; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1007; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1008; GISEL-VI-NEXT: s_endpgm 1009 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 37) 1010 store i64 %result, ptr addrspace(1) %out 1011 ret void 1012} 1013 1014define amdgpu_kernel void @v_icmp_i64_sgt(ptr addrspace(1) %out, i64 %src) { 1015; GFX11-LABEL: v_icmp_i64_sgt: 1016; GFX11: ; %bb.0: 1017; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1018; GFX11-NEXT: v_mov_b32_e32 v2, 0 1019; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1020; GFX11-NEXT: v_cmp_lt_i64_e64 s[2:3], 0x64, s[2:3] 1021; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1022; GFX11-NEXT: v_mov_b32_e32 v0, s2 1023; GFX11-NEXT: v_mov_b32_e32 v1, s3 1024; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1025; GFX11-NEXT: s_endpgm 1026; 1027; SDAG-VI-LABEL: v_icmp_i64_sgt: 1028; SDAG-VI: ; %bb.0: 1029; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1030; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1031; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 1032; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1033; SDAG-VI-NEXT: v_cmp_gt_i64_e64 s[2:3], s[2:3], v[0:1] 1034; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 1035; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 1036; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 1037; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 1038; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1039; SDAG-VI-NEXT: s_endpgm 1040; 1041; GFX9-LABEL: v_icmp_i64_sgt: 1042; GFX9: ; %bb.0: 1043; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1044; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1045; GFX9-NEXT: v_mov_b32_e32 v1, 0 1046; GFX9-NEXT: v_mov_b32_e32 v2, 0 1047; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1048; GFX9-NEXT: v_cmp_gt_i64_e64 s[2:3], s[2:3], v[0:1] 1049; GFX9-NEXT: v_mov_b32_e32 v0, s2 1050; GFX9-NEXT: v_mov_b32_e32 v1, s3 1051; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1052; GFX9-NEXT: s_endpgm 1053; 1054; GISEL-VI-LABEL: v_icmp_i64_sgt: 1055; GISEL-VI: ; %bb.0: 1056; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1057; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1058; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 1059; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1060; GISEL-VI-NEXT: v_cmp_gt_i64_e64 s[2:3], s[2:3], v[0:1] 1061; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1062; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1063; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1064; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1065; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1066; GISEL-VI-NEXT: s_endpgm 1067 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 38) 1068 store i64 %result, ptr addrspace(1) %out 1069 ret void 1070} 1071 1072define amdgpu_kernel void @v_icmp_i64_sge(ptr addrspace(1) %out, i64 %src) { 1073; GFX11-LABEL: v_icmp_i64_sge: 1074; GFX11: ; %bb.0: 1075; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1076; GFX11-NEXT: v_mov_b32_e32 v2, 0 1077; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1078; GFX11-NEXT: v_cmp_le_i64_e64 s[2:3], 0x64, s[2:3] 1079; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1080; GFX11-NEXT: v_mov_b32_e32 v0, s2 1081; GFX11-NEXT: v_mov_b32_e32 v1, s3 1082; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1083; GFX11-NEXT: s_endpgm 1084; 1085; SDAG-VI-LABEL: v_icmp_i64_sge: 1086; SDAG-VI: ; %bb.0: 1087; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1088; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1089; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 1090; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1091; SDAG-VI-NEXT: v_cmp_ge_i64_e64 s[2:3], s[2:3], v[0:1] 1092; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 1093; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 1094; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 1095; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 1096; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1097; SDAG-VI-NEXT: s_endpgm 1098; 1099; GFX9-LABEL: v_icmp_i64_sge: 1100; GFX9: ; %bb.0: 1101; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1102; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1103; GFX9-NEXT: v_mov_b32_e32 v1, 0 1104; GFX9-NEXT: v_mov_b32_e32 v2, 0 1105; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1106; GFX9-NEXT: v_cmp_ge_i64_e64 s[2:3], s[2:3], v[0:1] 1107; GFX9-NEXT: v_mov_b32_e32 v0, s2 1108; GFX9-NEXT: v_mov_b32_e32 v1, s3 1109; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1110; GFX9-NEXT: s_endpgm 1111; 1112; GISEL-VI-LABEL: v_icmp_i64_sge: 1113; GISEL-VI: ; %bb.0: 1114; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1115; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1116; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 1117; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1118; GISEL-VI-NEXT: v_cmp_ge_i64_e64 s[2:3], s[2:3], v[0:1] 1119; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1120; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1121; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1122; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1123; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1124; GISEL-VI-NEXT: s_endpgm 1125 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 39) 1126 store i64 %result, ptr addrspace(1) %out 1127 ret void 1128} 1129 1130define amdgpu_kernel void @v_icmp_i64_slt(ptr addrspace(1) %out, i64 %src) { 1131; GFX11-LABEL: v_icmp_i64_slt: 1132; GFX11: ; %bb.0: 1133; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1134; GFX11-NEXT: v_mov_b32_e32 v2, 0 1135; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1136; GFX11-NEXT: v_cmp_gt_i64_e64 s[2:3], 0x64, s[2:3] 1137; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1138; GFX11-NEXT: v_mov_b32_e32 v0, s2 1139; GFX11-NEXT: v_mov_b32_e32 v1, s3 1140; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1141; GFX11-NEXT: s_endpgm 1142; 1143; SDAG-VI-LABEL: v_icmp_i64_slt: 1144; SDAG-VI: ; %bb.0: 1145; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1146; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1147; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 1148; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1149; SDAG-VI-NEXT: v_cmp_lt_i64_e64 s[2:3], s[2:3], v[0:1] 1150; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 1151; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 1152; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 1153; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 1154; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1155; SDAG-VI-NEXT: s_endpgm 1156; 1157; GFX9-LABEL: v_icmp_i64_slt: 1158; GFX9: ; %bb.0: 1159; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1160; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1161; GFX9-NEXT: v_mov_b32_e32 v1, 0 1162; GFX9-NEXT: v_mov_b32_e32 v2, 0 1163; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1164; GFX9-NEXT: v_cmp_lt_i64_e64 s[2:3], s[2:3], v[0:1] 1165; GFX9-NEXT: v_mov_b32_e32 v0, s2 1166; GFX9-NEXT: v_mov_b32_e32 v1, s3 1167; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1168; GFX9-NEXT: s_endpgm 1169; 1170; GISEL-VI-LABEL: v_icmp_i64_slt: 1171; GISEL-VI: ; %bb.0: 1172; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1173; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1174; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 1175; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1176; GISEL-VI-NEXT: v_cmp_lt_i64_e64 s[2:3], s[2:3], v[0:1] 1177; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1178; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1179; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1180; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1181; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1182; GISEL-VI-NEXT: s_endpgm 1183 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 40) 1184 store i64 %result, ptr addrspace(1) %out 1185 ret void 1186} 1187 1188define amdgpu_kernel void @v_icmp_i64_sle(ptr addrspace(1) %out, i64 %src) { 1189; GFX11-LABEL: v_icmp_i64_sle: 1190; GFX11: ; %bb.0: 1191; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1192; GFX11-NEXT: v_mov_b32_e32 v2, 0 1193; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1194; GFX11-NEXT: v_cmp_ge_i64_e64 s[2:3], 0x64, s[2:3] 1195; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1196; GFX11-NEXT: v_mov_b32_e32 v0, s2 1197; GFX11-NEXT: v_mov_b32_e32 v1, s3 1198; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1199; GFX11-NEXT: s_endpgm 1200; 1201; SDAG-VI-LABEL: v_icmp_i64_sle: 1202; SDAG-VI: ; %bb.0: 1203; SDAG-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1204; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1205; SDAG-VI-NEXT: v_mov_b32_e32 v1, 0 1206; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1207; SDAG-VI-NEXT: v_cmp_le_i64_e64 s[2:3], s[2:3], v[0:1] 1208; SDAG-VI-NEXT: v_mov_b32_e32 v2, s0 1209; SDAG-VI-NEXT: v_mov_b32_e32 v0, s2 1210; SDAG-VI-NEXT: v_mov_b32_e32 v3, s1 1211; SDAG-VI-NEXT: v_mov_b32_e32 v1, s3 1212; SDAG-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1213; SDAG-VI-NEXT: s_endpgm 1214; 1215; GFX9-LABEL: v_icmp_i64_sle: 1216; GFX9: ; %bb.0: 1217; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1218; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1219; GFX9-NEXT: v_mov_b32_e32 v1, 0 1220; GFX9-NEXT: v_mov_b32_e32 v2, 0 1221; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1222; GFX9-NEXT: v_cmp_le_i64_e64 s[2:3], s[2:3], v[0:1] 1223; GFX9-NEXT: v_mov_b32_e32 v0, s2 1224; GFX9-NEXT: v_mov_b32_e32 v1, s3 1225; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1226; GFX9-NEXT: s_endpgm 1227; 1228; GISEL-VI-LABEL: v_icmp_i64_sle: 1229; GISEL-VI: ; %bb.0: 1230; GISEL-VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1231; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1232; GISEL-VI-NEXT: v_mov_b32_e32 v1, 0 1233; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1234; GISEL-VI-NEXT: v_cmp_le_i64_e64 s[2:3], s[2:3], v[0:1] 1235; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1236; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1237; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1238; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1239; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1240; GISEL-VI-NEXT: s_endpgm 1241 %result = call i64 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 41) 1242 store i64 %result, ptr addrspace(1) %out 1243 ret void 1244} 1245 1246define amdgpu_kernel void @v_icmp_i16_eq(ptr addrspace(1) %out, i16 %src) { 1247; GFX11-LABEL: v_icmp_i16_eq: 1248; GFX11: ; %bb.0: 1249; GFX11-NEXT: s_clause 0x1 1250; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1251; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1252; GFX11-NEXT: v_mov_b32_e32 v2, 0 1253; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1254; GFX11-NEXT: v_cmp_eq_u16_e64 s[2:3], 0x64, s2 1255; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1256; GFX11-NEXT: v_mov_b32_e32 v0, s2 1257; GFX11-NEXT: v_mov_b32_e32 v1, s3 1258; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1259; GFX11-NEXT: s_endpgm 1260; 1261; SDAG-VI-LABEL: v_icmp_i16_eq: 1262; SDAG-VI: ; %bb.0: 1263; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1264; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1265; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1266; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1267; SDAG-VI-NEXT: v_cmp_eq_u16_e64 s[2:3], s2, v0 1268; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1269; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1270; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1271; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1272; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1273; SDAG-VI-NEXT: s_endpgm 1274; 1275; GFX9-LABEL: v_icmp_i16_eq: 1276; GFX9: ; %bb.0: 1277; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1278; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1279; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1280; GFX9-NEXT: v_mov_b32_e32 v2, 0 1281; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1282; GFX9-NEXT: v_cmp_eq_u16_e64 s[2:3], s2, v0 1283; GFX9-NEXT: v_mov_b32_e32 v0, s2 1284; GFX9-NEXT: v_mov_b32_e32 v1, s3 1285; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1286; GFX9-NEXT: s_endpgm 1287; 1288; GISEL-VI-LABEL: v_icmp_i16_eq: 1289; GISEL-VI: ; %bb.0: 1290; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1291; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1292; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1293; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1294; GISEL-VI-NEXT: v_cmp_eq_u16_e64 s[2:3], s2, v0 1295; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1296; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1297; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1298; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1299; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1300; GISEL-VI-NEXT: s_endpgm 1301 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 32) 1302 store i64 %result, ptr addrspace(1) %out 1303 ret void 1304} 1305 1306define amdgpu_kernel void @v_icmp_i16(ptr addrspace(1) %out, i16 %src) { 1307; SDAG-GFX11-LABEL: v_icmp_i16: 1308; SDAG-GFX11: ; %bb.0: 1309; SDAG-GFX11-NEXT: s_endpgm 1310; 1311; SDAG-VI-LABEL: v_icmp_i16: 1312; SDAG-VI: ; %bb.0: 1313; SDAG-VI-NEXT: s_endpgm 1314; 1315; SDAG-GFX9-LABEL: v_icmp_i16: 1316; SDAG-GFX9: ; %bb.0: 1317; SDAG-GFX9-NEXT: s_endpgm 1318; 1319; GISEL-GFX11-LABEL: v_icmp_i16: 1320; GISEL-GFX11: ; %bb.0: 1321; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1322; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0 1323; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1324; GISEL-GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1] 1325; GISEL-GFX11-NEXT: s_endpgm 1326; 1327; GISEL-VI-LABEL: v_icmp_i16: 1328; GISEL-VI: ; %bb.0: 1329; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1330; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1331; GISEL-VI-NEXT: v_mov_b32_e32 v0, s0 1332; GISEL-VI-NEXT: v_mov_b32_e32 v1, s1 1333; GISEL-VI-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 1334; GISEL-VI-NEXT: s_endpgm 1335; 1336; GISEL-GFX9-LABEL: v_icmp_i16: 1337; GISEL-GFX9: ; %bb.0: 1338; GISEL-GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1339; GISEL-GFX9-NEXT: v_mov_b32_e32 v0, 0 1340; GISEL-GFX9-NEXT: s_waitcnt lgkmcnt(0) 1341; GISEL-GFX9-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1] 1342; GISEL-GFX9-NEXT: s_endpgm 1343 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 30) 1344 store i64 %result, ptr addrspace(1) %out 1345 ret void 1346} 1347 1348define amdgpu_kernel void @v_icmp_i16_ne(ptr addrspace(1) %out, i16 %src) { 1349; GFX11-LABEL: v_icmp_i16_ne: 1350; GFX11: ; %bb.0: 1351; GFX11-NEXT: s_clause 0x1 1352; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1353; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1354; GFX11-NEXT: v_mov_b32_e32 v2, 0 1355; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1356; GFX11-NEXT: v_cmp_ne_u16_e64 s[2:3], 0x64, s2 1357; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1358; GFX11-NEXT: v_mov_b32_e32 v0, s2 1359; GFX11-NEXT: v_mov_b32_e32 v1, s3 1360; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1361; GFX11-NEXT: s_endpgm 1362; 1363; SDAG-VI-LABEL: v_icmp_i16_ne: 1364; SDAG-VI: ; %bb.0: 1365; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1366; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1367; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1368; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1369; SDAG-VI-NEXT: v_cmp_ne_u16_e64 s[2:3], s2, v0 1370; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1371; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1372; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1373; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1374; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1375; SDAG-VI-NEXT: s_endpgm 1376; 1377; GFX9-LABEL: v_icmp_i16_ne: 1378; GFX9: ; %bb.0: 1379; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1380; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1381; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1382; GFX9-NEXT: v_mov_b32_e32 v2, 0 1383; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1384; GFX9-NEXT: v_cmp_ne_u16_e64 s[2:3], s2, v0 1385; GFX9-NEXT: v_mov_b32_e32 v0, s2 1386; GFX9-NEXT: v_mov_b32_e32 v1, s3 1387; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1388; GFX9-NEXT: s_endpgm 1389; 1390; GISEL-VI-LABEL: v_icmp_i16_ne: 1391; GISEL-VI: ; %bb.0: 1392; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1393; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1394; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1395; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1396; GISEL-VI-NEXT: v_cmp_ne_u16_e64 s[2:3], s2, v0 1397; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1398; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1399; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1400; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1401; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1402; GISEL-VI-NEXT: s_endpgm 1403 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 33) 1404 store i64 %result, ptr addrspace(1) %out 1405 ret void 1406} 1407 1408define amdgpu_kernel void @v_icmp_i16_ugt(ptr addrspace(1) %out, i16 %src) { 1409; GFX11-LABEL: v_icmp_i16_ugt: 1410; GFX11: ; %bb.0: 1411; GFX11-NEXT: s_clause 0x1 1412; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1413; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1414; GFX11-NEXT: v_mov_b32_e32 v2, 0 1415; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1416; GFX11-NEXT: v_cmp_lt_u16_e64 s[2:3], 0x64, s2 1417; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1418; GFX11-NEXT: v_mov_b32_e32 v0, s2 1419; GFX11-NEXT: v_mov_b32_e32 v1, s3 1420; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1421; GFX11-NEXT: s_endpgm 1422; 1423; SDAG-VI-LABEL: v_icmp_i16_ugt: 1424; SDAG-VI: ; %bb.0: 1425; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1426; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1427; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1428; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1429; SDAG-VI-NEXT: v_cmp_gt_u16_e64 s[2:3], s2, v0 1430; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1431; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1432; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1433; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1434; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1435; SDAG-VI-NEXT: s_endpgm 1436; 1437; GFX9-LABEL: v_icmp_i16_ugt: 1438; GFX9: ; %bb.0: 1439; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1440; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1441; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1442; GFX9-NEXT: v_mov_b32_e32 v2, 0 1443; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1444; GFX9-NEXT: v_cmp_gt_u16_e64 s[2:3], s2, v0 1445; GFX9-NEXT: v_mov_b32_e32 v0, s2 1446; GFX9-NEXT: v_mov_b32_e32 v1, s3 1447; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1448; GFX9-NEXT: s_endpgm 1449; 1450; GISEL-VI-LABEL: v_icmp_i16_ugt: 1451; GISEL-VI: ; %bb.0: 1452; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1453; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1454; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1455; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1456; GISEL-VI-NEXT: v_cmp_gt_u16_e64 s[2:3], s2, v0 1457; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1458; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1459; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1460; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1461; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1462; GISEL-VI-NEXT: s_endpgm 1463 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 34) 1464 store i64 %result, ptr addrspace(1) %out 1465 ret void 1466} 1467 1468define amdgpu_kernel void @v_icmp_i16_uge(ptr addrspace(1) %out, i16 %src) { 1469; GFX11-LABEL: v_icmp_i16_uge: 1470; GFX11: ; %bb.0: 1471; GFX11-NEXT: s_clause 0x1 1472; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1473; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1474; GFX11-NEXT: v_mov_b32_e32 v2, 0 1475; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1476; GFX11-NEXT: v_cmp_le_u16_e64 s[2:3], 0x64, s2 1477; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1478; GFX11-NEXT: v_mov_b32_e32 v0, s2 1479; GFX11-NEXT: v_mov_b32_e32 v1, s3 1480; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1481; GFX11-NEXT: s_endpgm 1482; 1483; SDAG-VI-LABEL: v_icmp_i16_uge: 1484; SDAG-VI: ; %bb.0: 1485; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1486; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1487; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1488; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1489; SDAG-VI-NEXT: v_cmp_ge_u16_e64 s[2:3], s2, v0 1490; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1491; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1492; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1493; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1494; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1495; SDAG-VI-NEXT: s_endpgm 1496; 1497; GFX9-LABEL: v_icmp_i16_uge: 1498; GFX9: ; %bb.0: 1499; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1500; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1501; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1502; GFX9-NEXT: v_mov_b32_e32 v2, 0 1503; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1504; GFX9-NEXT: v_cmp_ge_u16_e64 s[2:3], s2, v0 1505; GFX9-NEXT: v_mov_b32_e32 v0, s2 1506; GFX9-NEXT: v_mov_b32_e32 v1, s3 1507; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1508; GFX9-NEXT: s_endpgm 1509; 1510; GISEL-VI-LABEL: v_icmp_i16_uge: 1511; GISEL-VI: ; %bb.0: 1512; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1513; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1514; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1515; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1516; GISEL-VI-NEXT: v_cmp_ge_u16_e64 s[2:3], s2, v0 1517; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1518; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1519; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1520; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1521; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1522; GISEL-VI-NEXT: s_endpgm 1523 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 35) 1524 store i64 %result, ptr addrspace(1) %out 1525 ret void 1526} 1527 1528define amdgpu_kernel void @v_icmp_i16_ult(ptr addrspace(1) %out, i16 %src) { 1529; GFX11-LABEL: v_icmp_i16_ult: 1530; GFX11: ; %bb.0: 1531; GFX11-NEXT: s_clause 0x1 1532; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1533; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1534; GFX11-NEXT: v_mov_b32_e32 v2, 0 1535; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1536; GFX11-NEXT: v_cmp_gt_u16_e64 s[2:3], 0x64, s2 1537; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1538; GFX11-NEXT: v_mov_b32_e32 v0, s2 1539; GFX11-NEXT: v_mov_b32_e32 v1, s3 1540; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1541; GFX11-NEXT: s_endpgm 1542; 1543; SDAG-VI-LABEL: v_icmp_i16_ult: 1544; SDAG-VI: ; %bb.0: 1545; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1546; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1547; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1548; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1549; SDAG-VI-NEXT: v_cmp_lt_u16_e64 s[2:3], s2, v0 1550; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1551; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1552; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1553; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1554; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1555; SDAG-VI-NEXT: s_endpgm 1556; 1557; GFX9-LABEL: v_icmp_i16_ult: 1558; GFX9: ; %bb.0: 1559; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1560; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1561; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1562; GFX9-NEXT: v_mov_b32_e32 v2, 0 1563; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1564; GFX9-NEXT: v_cmp_lt_u16_e64 s[2:3], s2, v0 1565; GFX9-NEXT: v_mov_b32_e32 v0, s2 1566; GFX9-NEXT: v_mov_b32_e32 v1, s3 1567; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1568; GFX9-NEXT: s_endpgm 1569; 1570; GISEL-VI-LABEL: v_icmp_i16_ult: 1571; GISEL-VI: ; %bb.0: 1572; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1573; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1574; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1575; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1576; GISEL-VI-NEXT: v_cmp_lt_u16_e64 s[2:3], s2, v0 1577; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1578; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1579; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1580; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1581; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1582; GISEL-VI-NEXT: s_endpgm 1583 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 36) 1584 store i64 %result, ptr addrspace(1) %out 1585 ret void 1586} 1587 1588define amdgpu_kernel void @v_icmp_i16_ule(ptr addrspace(1) %out, i16 %src) { 1589; GFX11-LABEL: v_icmp_i16_ule: 1590; GFX11: ; %bb.0: 1591; GFX11-NEXT: s_clause 0x1 1592; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1593; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1594; GFX11-NEXT: v_mov_b32_e32 v2, 0 1595; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1596; GFX11-NEXT: v_cmp_ge_u16_e64 s[2:3], 0x64, s2 1597; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1598; GFX11-NEXT: v_mov_b32_e32 v0, s2 1599; GFX11-NEXT: v_mov_b32_e32 v1, s3 1600; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1601; GFX11-NEXT: s_endpgm 1602; 1603; SDAG-VI-LABEL: v_icmp_i16_ule: 1604; SDAG-VI: ; %bb.0: 1605; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1606; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1607; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1608; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1609; SDAG-VI-NEXT: v_cmp_le_u16_e64 s[2:3], s2, v0 1610; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1611; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1612; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1613; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1614; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1615; SDAG-VI-NEXT: s_endpgm 1616; 1617; GFX9-LABEL: v_icmp_i16_ule: 1618; GFX9: ; %bb.0: 1619; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1620; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1621; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1622; GFX9-NEXT: v_mov_b32_e32 v2, 0 1623; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1624; GFX9-NEXT: v_cmp_le_u16_e64 s[2:3], s2, v0 1625; GFX9-NEXT: v_mov_b32_e32 v0, s2 1626; GFX9-NEXT: v_mov_b32_e32 v1, s3 1627; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1628; GFX9-NEXT: s_endpgm 1629; 1630; GISEL-VI-LABEL: v_icmp_i16_ule: 1631; GISEL-VI: ; %bb.0: 1632; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1633; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1634; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1635; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1636; GISEL-VI-NEXT: v_cmp_le_u16_e64 s[2:3], s2, v0 1637; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1638; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1639; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1640; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1641; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1642; GISEL-VI-NEXT: s_endpgm 1643 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 37) 1644 store i64 %result, ptr addrspace(1) %out 1645 ret void 1646} 1647 1648define amdgpu_kernel void @v_icmp_i16_sgt(ptr addrspace(1) %out, i16 %src) #1 { 1649; GFX11-LABEL: v_icmp_i16_sgt: 1650; GFX11: ; %bb.0: 1651; GFX11-NEXT: s_clause 0x1 1652; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1653; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1654; GFX11-NEXT: v_mov_b32_e32 v2, 0 1655; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1656; GFX11-NEXT: v_cmp_lt_i16_e64 s[2:3], 0x64, s2 1657; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1658; GFX11-NEXT: v_mov_b32_e32 v0, s2 1659; GFX11-NEXT: v_mov_b32_e32 v1, s3 1660; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1661; GFX11-NEXT: s_endpgm 1662; 1663; SDAG-VI-LABEL: v_icmp_i16_sgt: 1664; SDAG-VI: ; %bb.0: 1665; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1666; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1667; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1668; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1669; SDAG-VI-NEXT: v_cmp_gt_i16_e64 s[2:3], s2, v0 1670; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1671; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1672; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1673; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1674; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1675; SDAG-VI-NEXT: s_endpgm 1676; 1677; GFX9-LABEL: v_icmp_i16_sgt: 1678; GFX9: ; %bb.0: 1679; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1680; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1681; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1682; GFX9-NEXT: v_mov_b32_e32 v2, 0 1683; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1684; GFX9-NEXT: v_cmp_gt_i16_e64 s[2:3], s2, v0 1685; GFX9-NEXT: v_mov_b32_e32 v0, s2 1686; GFX9-NEXT: v_mov_b32_e32 v1, s3 1687; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1688; GFX9-NEXT: s_endpgm 1689; 1690; GISEL-VI-LABEL: v_icmp_i16_sgt: 1691; GISEL-VI: ; %bb.0: 1692; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1693; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1694; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1695; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1696; GISEL-VI-NEXT: v_cmp_gt_i16_e64 s[2:3], s2, v0 1697; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1698; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1699; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1700; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1701; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1702; GISEL-VI-NEXT: s_endpgm 1703 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 38) 1704 store i64 %result, ptr addrspace(1) %out 1705 ret void 1706} 1707 1708define amdgpu_kernel void @v_icmp_i16_sge(ptr addrspace(1) %out, i16 %src) { 1709; GFX11-LABEL: v_icmp_i16_sge: 1710; GFX11: ; %bb.0: 1711; GFX11-NEXT: s_clause 0x1 1712; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1713; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1714; GFX11-NEXT: v_mov_b32_e32 v2, 0 1715; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1716; GFX11-NEXT: v_cmp_le_i16_e64 s[2:3], 0x64, s2 1717; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1718; GFX11-NEXT: v_mov_b32_e32 v0, s2 1719; GFX11-NEXT: v_mov_b32_e32 v1, s3 1720; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1721; GFX11-NEXT: s_endpgm 1722; 1723; SDAG-VI-LABEL: v_icmp_i16_sge: 1724; SDAG-VI: ; %bb.0: 1725; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1726; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1727; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1728; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1729; SDAG-VI-NEXT: v_cmp_ge_i16_e64 s[2:3], s2, v0 1730; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1731; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1732; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1733; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1734; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1735; SDAG-VI-NEXT: s_endpgm 1736; 1737; GFX9-LABEL: v_icmp_i16_sge: 1738; GFX9: ; %bb.0: 1739; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1740; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1741; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1742; GFX9-NEXT: v_mov_b32_e32 v2, 0 1743; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1744; GFX9-NEXT: v_cmp_ge_i16_e64 s[2:3], s2, v0 1745; GFX9-NEXT: v_mov_b32_e32 v0, s2 1746; GFX9-NEXT: v_mov_b32_e32 v1, s3 1747; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1748; GFX9-NEXT: s_endpgm 1749; 1750; GISEL-VI-LABEL: v_icmp_i16_sge: 1751; GISEL-VI: ; %bb.0: 1752; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1753; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1754; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1755; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1756; GISEL-VI-NEXT: v_cmp_ge_i16_e64 s[2:3], s2, v0 1757; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1758; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1759; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1760; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1761; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1762; GISEL-VI-NEXT: s_endpgm 1763 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 39) 1764 store i64 %result, ptr addrspace(1) %out 1765 ret void 1766} 1767 1768define amdgpu_kernel void @v_icmp_i16_slt(ptr addrspace(1) %out, i16 %src) { 1769; GFX11-LABEL: v_icmp_i16_slt: 1770; GFX11: ; %bb.0: 1771; GFX11-NEXT: s_clause 0x1 1772; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1773; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1774; GFX11-NEXT: v_mov_b32_e32 v2, 0 1775; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1776; GFX11-NEXT: v_cmp_gt_i16_e64 s[2:3], 0x64, s2 1777; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1778; GFX11-NEXT: v_mov_b32_e32 v0, s2 1779; GFX11-NEXT: v_mov_b32_e32 v1, s3 1780; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1781; GFX11-NEXT: s_endpgm 1782; 1783; SDAG-VI-LABEL: v_icmp_i16_slt: 1784; SDAG-VI: ; %bb.0: 1785; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1786; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1787; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1788; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1789; SDAG-VI-NEXT: v_cmp_lt_i16_e64 s[2:3], s2, v0 1790; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1791; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1792; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1793; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1794; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1795; SDAG-VI-NEXT: s_endpgm 1796; 1797; GFX9-LABEL: v_icmp_i16_slt: 1798; GFX9: ; %bb.0: 1799; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1800; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1801; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1802; GFX9-NEXT: v_mov_b32_e32 v2, 0 1803; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1804; GFX9-NEXT: v_cmp_lt_i16_e64 s[2:3], s2, v0 1805; GFX9-NEXT: v_mov_b32_e32 v0, s2 1806; GFX9-NEXT: v_mov_b32_e32 v1, s3 1807; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1808; GFX9-NEXT: s_endpgm 1809; 1810; GISEL-VI-LABEL: v_icmp_i16_slt: 1811; GISEL-VI: ; %bb.0: 1812; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1813; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1814; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1815; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1816; GISEL-VI-NEXT: v_cmp_lt_i16_e64 s[2:3], s2, v0 1817; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1818; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1819; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1820; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1821; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1822; GISEL-VI-NEXT: s_endpgm 1823 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 40) 1824 store i64 %result, ptr addrspace(1) %out 1825 ret void 1826} 1827 1828define amdgpu_kernel void @v_icmp_i16_sle(ptr addrspace(1) %out, i16 %src) { 1829; GFX11-LABEL: v_icmp_i16_sle: 1830; GFX11: ; %bb.0: 1831; GFX11-NEXT: s_clause 0x1 1832; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1833; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1834; GFX11-NEXT: v_mov_b32_e32 v2, 0 1835; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1836; GFX11-NEXT: v_cmp_ge_i16_e64 s[2:3], 0x64, s2 1837; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2) 1838; GFX11-NEXT: v_mov_b32_e32 v0, s2 1839; GFX11-NEXT: v_mov_b32_e32 v1, s3 1840; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1841; GFX11-NEXT: s_endpgm 1842; 1843; SDAG-VI-LABEL: v_icmp_i16_sle: 1844; SDAG-VI: ; %bb.0: 1845; SDAG-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1846; SDAG-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1847; SDAG-VI-NEXT: v_mov_b32_e32 v0, 0x64 1848; SDAG-VI-NEXT: s_waitcnt lgkmcnt(0) 1849; SDAG-VI-NEXT: v_cmp_le_i16_e64 s[2:3], s2, v0 1850; SDAG-VI-NEXT: v_mov_b32_e32 v0, s0 1851; SDAG-VI-NEXT: v_mov_b32_e32 v2, s2 1852; SDAG-VI-NEXT: v_mov_b32_e32 v1, s1 1853; SDAG-VI-NEXT: v_mov_b32_e32 v3, s3 1854; SDAG-VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1855; SDAG-VI-NEXT: s_endpgm 1856; 1857; GFX9-LABEL: v_icmp_i16_sle: 1858; GFX9: ; %bb.0: 1859; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c 1860; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1861; GFX9-NEXT: v_mov_b32_e32 v0, 0x64 1862; GFX9-NEXT: v_mov_b32_e32 v2, 0 1863; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1864; GFX9-NEXT: v_cmp_le_i16_e64 s[2:3], s2, v0 1865; GFX9-NEXT: v_mov_b32_e32 v0, s2 1866; GFX9-NEXT: v_mov_b32_e32 v1, s3 1867; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1868; GFX9-NEXT: s_endpgm 1869; 1870; GISEL-VI-LABEL: v_icmp_i16_sle: 1871; GISEL-VI: ; %bb.0: 1872; GISEL-VI-NEXT: s_load_dword s2, s[4:5], 0x2c 1873; GISEL-VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1874; GISEL-VI-NEXT: v_mov_b32_e32 v0, 0x64 1875; GISEL-VI-NEXT: s_waitcnt lgkmcnt(0) 1876; GISEL-VI-NEXT: v_cmp_le_i16_e64 s[2:3], s2, v0 1877; GISEL-VI-NEXT: v_mov_b32_e32 v0, s2 1878; GISEL-VI-NEXT: v_mov_b32_e32 v3, s1 1879; GISEL-VI-NEXT: v_mov_b32_e32 v1, s3 1880; GISEL-VI-NEXT: v_mov_b32_e32 v2, s0 1881; GISEL-VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 1882; GISEL-VI-NEXT: s_endpgm 1883 %result = call i64 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 41) 1884 store i64 %result, ptr addrspace(1) %out 1885 ret void 1886} 1887 1888define amdgpu_kernel void @v_icmp_i1_ne0(ptr addrspace(1) %out, i32 %a, i32 %b) { 1889; GFX11-LABEL: v_icmp_i1_ne0: 1890; GFX11: ; %bb.0: 1891; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1892; GFX11-NEXT: v_mov_b32_e32 v2, 0 1893; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1894; GFX11-NEXT: s_cmp_gt_u32 s2, 1 1895; GFX11-NEXT: s_cselect_b64 s[4:5], -1, 0 1896; GFX11-NEXT: s_cmp_gt_u32 s3, 2 1897; GFX11-NEXT: s_cselect_b64 s[2:3], -1, 0 1898; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) 1899; GFX11-NEXT: s_and_b64 s[2:3], s[4:5], s[2:3] 1900; GFX11-NEXT: v_mov_b32_e32 v0, s2 1901; GFX11-NEXT: v_mov_b32_e32 v1, s3 1902; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 1903; GFX11-NEXT: s_endpgm 1904; 1905; VI-LABEL: v_icmp_i1_ne0: 1906; VI: ; %bb.0: 1907; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1908; VI-NEXT: s_waitcnt lgkmcnt(0) 1909; VI-NEXT: s_cmp_gt_u32 s2, 1 1910; VI-NEXT: s_cselect_b64 s[4:5], -1, 0 1911; VI-NEXT: s_cmp_gt_u32 s3, 2 1912; VI-NEXT: s_cselect_b64 s[2:3], -1, 0 1913; VI-NEXT: s_and_b64 s[2:3], s[4:5], s[2:3] 1914; VI-NEXT: v_mov_b32_e32 v0, s0 1915; VI-NEXT: v_mov_b32_e32 v2, s2 1916; VI-NEXT: v_mov_b32_e32 v1, s1 1917; VI-NEXT: v_mov_b32_e32 v3, s3 1918; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] 1919; VI-NEXT: s_endpgm 1920; 1921; GFX9-LABEL: v_icmp_i1_ne0: 1922; GFX9: ; %bb.0: 1923; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1924; GFX9-NEXT: v_mov_b32_e32 v2, 0 1925; GFX9-NEXT: s_waitcnt lgkmcnt(0) 1926; GFX9-NEXT: s_cmp_gt_u32 s2, 1 1927; GFX9-NEXT: s_cselect_b64 s[4:5], -1, 0 1928; GFX9-NEXT: s_cmp_gt_u32 s3, 2 1929; GFX9-NEXT: s_cselect_b64 s[2:3], -1, 0 1930; GFX9-NEXT: s_and_b64 s[2:3], s[4:5], s[2:3] 1931; GFX9-NEXT: v_mov_b32_e32 v0, s2 1932; GFX9-NEXT: v_mov_b32_e32 v1, s3 1933; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 1934; GFX9-NEXT: s_endpgm 1935 %c0 = icmp ugt i32 %a, 1 1936 %c1 = icmp ugt i32 %b, 2 1937 %src = and i1 %c0, %c1 1938 %result = call i64 @llvm.amdgcn.icmp.i1(i1 %src, i1 false, i32 33) 1939 store i64 %result, ptr addrspace(1) %out 1940 ret void 1941} 1942 1943define amdgpu_ps void @test_intr_icmp_i32_invalid_cc(ptr addrspace(1) %out, i32 %src) { 1944; SDAG-GFX11-LABEL: test_intr_icmp_i32_invalid_cc: 1945; SDAG-GFX11: ; %bb.0: 1946; SDAG-GFX11-NEXT: s_endpgm 1947; 1948; SDAG-VI-LABEL: test_intr_icmp_i32_invalid_cc: 1949; SDAG-VI: ; %bb.0: 1950; SDAG-VI-NEXT: s_endpgm 1951; 1952; SDAG-GFX9-LABEL: test_intr_icmp_i32_invalid_cc: 1953; SDAG-GFX9: ; %bb.0: 1954; SDAG-GFX9-NEXT: s_endpgm 1955; 1956; GISEL-GFX11-LABEL: test_intr_icmp_i32_invalid_cc: 1957; GISEL-GFX11: ; %bb.0: 1958; GISEL-GFX11-NEXT: global_store_b64 v[0:1], v[0:1], off 1959; GISEL-GFX11-NEXT: s_endpgm 1960; 1961; GISEL-VI-LABEL: test_intr_icmp_i32_invalid_cc: 1962; GISEL-VI: ; %bb.0: 1963; GISEL-VI-NEXT: flat_store_dwordx2 v[0:1], v[0:1] 1964; GISEL-VI-NEXT: s_endpgm 1965; 1966; GISEL-GFX9-LABEL: test_intr_icmp_i32_invalid_cc: 1967; GISEL-GFX9: ; %bb.0: 1968; GISEL-GFX9-NEXT: global_store_dwordx2 v[0:1], v[0:1], off 1969; GISEL-GFX9-NEXT: s_endpgm 1970 %result = call i64 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 9999) 1971 store i64 %result, ptr addrspace(1) %out 1972 ret void 1973} 1974 1975attributes #0 = { nounwind readnone convergent } 1976;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 1977; GCN: {{.*}} 1978