1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize32" -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX11,SDAG-GFX11 %s 3; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr="+wavefrontsize32" -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10,SDAG-GFX10 %s 4 5; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 -mattr="+wavefrontsize32" -verify-machineinstrs < %s 2>%t | FileCheck -check-prefixes=GCN,GFX11,GISEL-GFX11 %s 6; RUN: FileCheck --check-prefix=ERR %s < %t 7; RUN: llc -global-isel -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1010 -mattr="+wavefrontsize32" -verify-machineinstrs < %s 2>%t | FileCheck -check-prefixes=GCN,GFX10,GISEL-GFX10 %s 8; RUN: FileCheck --check-prefix=ERR %s < %t 9 10; Note: GlobalISel abort is disabled so we don't crash on i1 inputs. 11; They are allowed in DAGISel but we (intentionally) don't support them 12; in GlobalISel. 13 14; ERR: warning: Instruction selection used fallback path for v_icmp_i1_ne0 15 16declare i32 @llvm.amdgcn.icmp.i32(i32, i32, i32) #0 17declare i32 @llvm.amdgcn.icmp.i64(i64, i64, i32) #0 18declare i32 @llvm.amdgcn.icmp.i16(i16, i16, i32) #0 19declare i32 @llvm.amdgcn.icmp.i1(i1, i1, i32) #0 20 21define amdgpu_kernel void @v_icmp_i32_eq(ptr addrspace(1) %out, i32 %src) { 22; SDAG-GFX11-LABEL: v_icmp_i32_eq: 23; SDAG-GFX11: ; %bb.0: 24; SDAG-GFX11-NEXT: s_clause 0x1 25; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 26; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 27; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 28; SDAG-GFX11-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s2 29; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 30; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 31; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 32; SDAG-GFX11-NEXT: s_endpgm 33; 34; SDAG-GFX10-LABEL: v_icmp_i32_eq: 35; SDAG-GFX10: ; %bb.0: 36; SDAG-GFX10-NEXT: s_clause 0x1 37; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 38; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 39; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 40; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 41; SDAG-GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s2 42; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 43; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 44; SDAG-GFX10-NEXT: s_endpgm 45; 46; GISEL-GFX11-LABEL: v_icmp_i32_eq: 47; GISEL-GFX11: ; %bb.0: 48; GISEL-GFX11-NEXT: s_clause 0x1 49; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 50; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 51; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 52; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 53; GISEL-GFX11-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s2 54; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 55; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 56; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 57; GISEL-GFX11-NEXT: s_endpgm 58; 59; GISEL-GFX10-LABEL: v_icmp_i32_eq: 60; GISEL-GFX10: ; %bb.0: 61; GISEL-GFX10-NEXT: s_clause 0x1 62; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 63; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 64; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 65; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 66; GISEL-GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0x64, s2 67; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 68; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 69; GISEL-GFX10-NEXT: s_endpgm 70 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 32) 71 store i32 %result, ptr addrspace(1) %out 72 ret void 73} 74 75define amdgpu_kernel void @v_icmp_i32(ptr addrspace(1) %out, i32 %src) { 76; SDAG-GFX11-LABEL: v_icmp_i32: 77; SDAG-GFX11: ; %bb.0: 78; SDAG-GFX11-NEXT: s_endpgm 79; 80; SDAG-GFX10-LABEL: v_icmp_i32: 81; SDAG-GFX10: ; %bb.0: 82; SDAG-GFX10-NEXT: s_endpgm 83; 84; GISEL-GFX11-LABEL: v_icmp_i32: 85; GISEL-GFX11: ; %bb.0: 86; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 87; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0 88; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 89; GISEL-GFX11-NEXT: global_store_b32 v0, v0, s[0:1] 90; GISEL-GFX11-NEXT: s_endpgm 91; 92; GISEL-GFX10-LABEL: v_icmp_i32: 93; GISEL-GFX10: ; %bb.0: 94; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 95; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0 96; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 97; GISEL-GFX10-NEXT: global_store_dword v0, v0, s[0:1] 98; GISEL-GFX10-NEXT: s_endpgm 99 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 30) 100 store i32 %result, ptr addrspace(1) %out 101 ret void 102} 103 104define amdgpu_kernel void @v_icmp_i32_ne(ptr addrspace(1) %out, i32 %src) { 105; SDAG-GFX11-LABEL: v_icmp_i32_ne: 106; SDAG-GFX11: ; %bb.0: 107; SDAG-GFX11-NEXT: s_clause 0x1 108; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 109; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 110; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 111; SDAG-GFX11-NEXT: v_cmp_ne_u32_e64 s2, 0x64, s2 112; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 113; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 114; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 115; SDAG-GFX11-NEXT: s_endpgm 116; 117; SDAG-GFX10-LABEL: v_icmp_i32_ne: 118; SDAG-GFX10: ; %bb.0: 119; SDAG-GFX10-NEXT: s_clause 0x1 120; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 121; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 122; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 123; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 124; SDAG-GFX10-NEXT: v_cmp_ne_u32_e64 s2, 0x64, s2 125; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 126; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 127; SDAG-GFX10-NEXT: s_endpgm 128; 129; GISEL-GFX11-LABEL: v_icmp_i32_ne: 130; GISEL-GFX11: ; %bb.0: 131; GISEL-GFX11-NEXT: s_clause 0x1 132; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 133; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 134; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 135; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 136; GISEL-GFX11-NEXT: v_cmp_ne_u32_e64 s2, 0x64, s2 137; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 138; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 139; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 140; GISEL-GFX11-NEXT: s_endpgm 141; 142; GISEL-GFX10-LABEL: v_icmp_i32_ne: 143; GISEL-GFX10: ; %bb.0: 144; GISEL-GFX10-NEXT: s_clause 0x1 145; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 146; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 147; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 148; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 149; GISEL-GFX10-NEXT: v_cmp_ne_u32_e64 s2, 0x64, s2 150; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 151; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 152; GISEL-GFX10-NEXT: s_endpgm 153 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 33) 154 store i32 %result, ptr addrspace(1) %out 155 ret void 156} 157 158define amdgpu_kernel void @v_icmp_i32_ugt(ptr addrspace(1) %out, i32 %src) { 159; SDAG-GFX11-LABEL: v_icmp_i32_ugt: 160; SDAG-GFX11: ; %bb.0: 161; SDAG-GFX11-NEXT: s_clause 0x1 162; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 163; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 164; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 165; SDAG-GFX11-NEXT: v_cmp_lt_u32_e64 s2, 0x64, s2 166; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 167; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 168; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 169; SDAG-GFX11-NEXT: s_endpgm 170; 171; SDAG-GFX10-LABEL: v_icmp_i32_ugt: 172; SDAG-GFX10: ; %bb.0: 173; SDAG-GFX10-NEXT: s_clause 0x1 174; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 175; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 176; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 177; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 178; SDAG-GFX10-NEXT: v_cmp_lt_u32_e64 s2, 0x64, s2 179; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 180; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 181; SDAG-GFX10-NEXT: s_endpgm 182; 183; GISEL-GFX11-LABEL: v_icmp_i32_ugt: 184; GISEL-GFX11: ; %bb.0: 185; GISEL-GFX11-NEXT: s_clause 0x1 186; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 187; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 188; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 189; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 190; GISEL-GFX11-NEXT: v_cmp_lt_u32_e64 s2, 0x64, s2 191; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 192; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 193; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 194; GISEL-GFX11-NEXT: s_endpgm 195; 196; GISEL-GFX10-LABEL: v_icmp_i32_ugt: 197; GISEL-GFX10: ; %bb.0: 198; GISEL-GFX10-NEXT: s_clause 0x1 199; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 200; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 201; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 202; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 203; GISEL-GFX10-NEXT: v_cmp_lt_u32_e64 s2, 0x64, s2 204; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 205; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 206; GISEL-GFX10-NEXT: s_endpgm 207 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 34) 208 store i32 %result, ptr addrspace(1) %out 209 ret void 210} 211 212define amdgpu_kernel void @v_icmp_i32_uge(ptr addrspace(1) %out, i32 %src) { 213; SDAG-GFX11-LABEL: v_icmp_i32_uge: 214; SDAG-GFX11: ; %bb.0: 215; SDAG-GFX11-NEXT: s_clause 0x1 216; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 217; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 218; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 219; SDAG-GFX11-NEXT: v_cmp_le_u32_e64 s2, 0x64, s2 220; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 221; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 222; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 223; SDAG-GFX11-NEXT: s_endpgm 224; 225; SDAG-GFX10-LABEL: v_icmp_i32_uge: 226; SDAG-GFX10: ; %bb.0: 227; SDAG-GFX10-NEXT: s_clause 0x1 228; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 229; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 230; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 231; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 232; SDAG-GFX10-NEXT: v_cmp_le_u32_e64 s2, 0x64, s2 233; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 234; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 235; SDAG-GFX10-NEXT: s_endpgm 236; 237; GISEL-GFX11-LABEL: v_icmp_i32_uge: 238; GISEL-GFX11: ; %bb.0: 239; GISEL-GFX11-NEXT: s_clause 0x1 240; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 241; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 242; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 243; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 244; GISEL-GFX11-NEXT: v_cmp_le_u32_e64 s2, 0x64, s2 245; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 246; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 247; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 248; GISEL-GFX11-NEXT: s_endpgm 249; 250; GISEL-GFX10-LABEL: v_icmp_i32_uge: 251; GISEL-GFX10: ; %bb.0: 252; GISEL-GFX10-NEXT: s_clause 0x1 253; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 254; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 255; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 256; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 257; GISEL-GFX10-NEXT: v_cmp_le_u32_e64 s2, 0x64, s2 258; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 259; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 260; GISEL-GFX10-NEXT: s_endpgm 261 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 35) 262 store i32 %result, ptr addrspace(1) %out 263 ret void 264} 265 266define amdgpu_kernel void @v_icmp_i32_ult(ptr addrspace(1) %out, i32 %src) { 267; SDAG-GFX11-LABEL: v_icmp_i32_ult: 268; SDAG-GFX11: ; %bb.0: 269; SDAG-GFX11-NEXT: s_clause 0x1 270; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 271; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 272; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 273; SDAG-GFX11-NEXT: v_cmp_gt_u32_e64 s2, 0x64, s2 274; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 275; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 276; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 277; SDAG-GFX11-NEXT: s_endpgm 278; 279; SDAG-GFX10-LABEL: v_icmp_i32_ult: 280; SDAG-GFX10: ; %bb.0: 281; SDAG-GFX10-NEXT: s_clause 0x1 282; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 283; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 284; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 285; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 286; SDAG-GFX10-NEXT: v_cmp_gt_u32_e64 s2, 0x64, s2 287; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 288; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 289; SDAG-GFX10-NEXT: s_endpgm 290; 291; GISEL-GFX11-LABEL: v_icmp_i32_ult: 292; GISEL-GFX11: ; %bb.0: 293; GISEL-GFX11-NEXT: s_clause 0x1 294; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 295; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 296; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 297; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 298; GISEL-GFX11-NEXT: v_cmp_gt_u32_e64 s2, 0x64, s2 299; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 300; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 301; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 302; GISEL-GFX11-NEXT: s_endpgm 303; 304; GISEL-GFX10-LABEL: v_icmp_i32_ult: 305; GISEL-GFX10: ; %bb.0: 306; GISEL-GFX10-NEXT: s_clause 0x1 307; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 308; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 309; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 310; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 311; GISEL-GFX10-NEXT: v_cmp_gt_u32_e64 s2, 0x64, s2 312; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 313; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 314; GISEL-GFX10-NEXT: s_endpgm 315 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 36) 316 store i32 %result, ptr addrspace(1) %out 317 ret void 318} 319 320define amdgpu_kernel void @v_icmp_i32_ule(ptr addrspace(1) %out, i32 %src) { 321; SDAG-GFX11-LABEL: v_icmp_i32_ule: 322; SDAG-GFX11: ; %bb.0: 323; SDAG-GFX11-NEXT: s_clause 0x1 324; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 325; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 326; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 327; SDAG-GFX11-NEXT: v_cmp_ge_u32_e64 s2, 0x64, s2 328; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 329; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 330; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 331; SDAG-GFX11-NEXT: s_endpgm 332; 333; SDAG-GFX10-LABEL: v_icmp_i32_ule: 334; SDAG-GFX10: ; %bb.0: 335; SDAG-GFX10-NEXT: s_clause 0x1 336; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 337; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 338; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 339; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 340; SDAG-GFX10-NEXT: v_cmp_ge_u32_e64 s2, 0x64, s2 341; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 342; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 343; SDAG-GFX10-NEXT: s_endpgm 344; 345; GISEL-GFX11-LABEL: v_icmp_i32_ule: 346; GISEL-GFX11: ; %bb.0: 347; GISEL-GFX11-NEXT: s_clause 0x1 348; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 349; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 350; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 351; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 352; GISEL-GFX11-NEXT: v_cmp_ge_u32_e64 s2, 0x64, s2 353; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 354; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 355; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 356; GISEL-GFX11-NEXT: s_endpgm 357; 358; GISEL-GFX10-LABEL: v_icmp_i32_ule: 359; GISEL-GFX10: ; %bb.0: 360; GISEL-GFX10-NEXT: s_clause 0x1 361; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 362; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 363; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 364; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 365; GISEL-GFX10-NEXT: v_cmp_ge_u32_e64 s2, 0x64, s2 366; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 367; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 368; GISEL-GFX10-NEXT: s_endpgm 369 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 37) 370 store i32 %result, ptr addrspace(1) %out 371 ret void 372} 373 374define amdgpu_kernel void @v_icmp_i32_sgt(ptr addrspace(1) %out, i32 %src) #1 { 375; SDAG-GFX11-LABEL: v_icmp_i32_sgt: 376; SDAG-GFX11: ; %bb.0: 377; SDAG-GFX11-NEXT: s_clause 0x1 378; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 379; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 380; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 381; SDAG-GFX11-NEXT: v_cmp_lt_i32_e64 s2, 0x64, s2 382; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 383; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 384; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 385; SDAG-GFX11-NEXT: s_endpgm 386; 387; SDAG-GFX10-LABEL: v_icmp_i32_sgt: 388; SDAG-GFX10: ; %bb.0: 389; SDAG-GFX10-NEXT: s_clause 0x1 390; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 391; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 392; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 393; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 394; SDAG-GFX10-NEXT: v_cmp_lt_i32_e64 s2, 0x64, s2 395; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 396; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 397; SDAG-GFX10-NEXT: s_endpgm 398; 399; GISEL-GFX11-LABEL: v_icmp_i32_sgt: 400; GISEL-GFX11: ; %bb.0: 401; GISEL-GFX11-NEXT: s_clause 0x1 402; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 403; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 404; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 405; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 406; GISEL-GFX11-NEXT: v_cmp_lt_i32_e64 s2, 0x64, s2 407; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 408; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 409; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 410; GISEL-GFX11-NEXT: s_endpgm 411; 412; GISEL-GFX10-LABEL: v_icmp_i32_sgt: 413; GISEL-GFX10: ; %bb.0: 414; GISEL-GFX10-NEXT: s_clause 0x1 415; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 416; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 417; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 418; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 419; GISEL-GFX10-NEXT: v_cmp_lt_i32_e64 s2, 0x64, s2 420; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 421; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 422; GISEL-GFX10-NEXT: s_endpgm 423 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 38) 424 store i32 %result, ptr addrspace(1) %out 425 ret void 426} 427 428define amdgpu_kernel void @v_icmp_i32_sge(ptr addrspace(1) %out, i32 %src) { 429; SDAG-GFX11-LABEL: v_icmp_i32_sge: 430; SDAG-GFX11: ; %bb.0: 431; SDAG-GFX11-NEXT: s_clause 0x1 432; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 433; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 434; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 435; SDAG-GFX11-NEXT: v_cmp_le_i32_e64 s2, 0x64, s2 436; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 437; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 438; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 439; SDAG-GFX11-NEXT: s_endpgm 440; 441; SDAG-GFX10-LABEL: v_icmp_i32_sge: 442; SDAG-GFX10: ; %bb.0: 443; SDAG-GFX10-NEXT: s_clause 0x1 444; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 445; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 446; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 447; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 448; SDAG-GFX10-NEXT: v_cmp_le_i32_e64 s2, 0x64, s2 449; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 450; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 451; SDAG-GFX10-NEXT: s_endpgm 452; 453; GISEL-GFX11-LABEL: v_icmp_i32_sge: 454; GISEL-GFX11: ; %bb.0: 455; GISEL-GFX11-NEXT: s_clause 0x1 456; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 457; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 458; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 459; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 460; GISEL-GFX11-NEXT: v_cmp_le_i32_e64 s2, 0x64, s2 461; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 462; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 463; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 464; GISEL-GFX11-NEXT: s_endpgm 465; 466; GISEL-GFX10-LABEL: v_icmp_i32_sge: 467; GISEL-GFX10: ; %bb.0: 468; GISEL-GFX10-NEXT: s_clause 0x1 469; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 470; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 471; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 472; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 473; GISEL-GFX10-NEXT: v_cmp_le_i32_e64 s2, 0x64, s2 474; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 475; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 476; GISEL-GFX10-NEXT: s_endpgm 477 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 39) 478 store i32 %result, ptr addrspace(1) %out 479 ret void 480} 481 482define amdgpu_kernel void @v_icmp_i32_slt(ptr addrspace(1) %out, i32 %src) { 483; SDAG-GFX11-LABEL: v_icmp_i32_slt: 484; SDAG-GFX11: ; %bb.0: 485; SDAG-GFX11-NEXT: s_clause 0x1 486; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 487; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 488; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 489; SDAG-GFX11-NEXT: v_cmp_gt_i32_e64 s2, 0x64, s2 490; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 491; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 492; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 493; SDAG-GFX11-NEXT: s_endpgm 494; 495; SDAG-GFX10-LABEL: v_icmp_i32_slt: 496; SDAG-GFX10: ; %bb.0: 497; SDAG-GFX10-NEXT: s_clause 0x1 498; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 499; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 500; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 501; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 502; SDAG-GFX10-NEXT: v_cmp_gt_i32_e64 s2, 0x64, s2 503; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 504; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 505; SDAG-GFX10-NEXT: s_endpgm 506; 507; GISEL-GFX11-LABEL: v_icmp_i32_slt: 508; GISEL-GFX11: ; %bb.0: 509; GISEL-GFX11-NEXT: s_clause 0x1 510; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 511; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 512; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 513; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 514; GISEL-GFX11-NEXT: v_cmp_gt_i32_e64 s2, 0x64, s2 515; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 516; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 517; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 518; GISEL-GFX11-NEXT: s_endpgm 519; 520; GISEL-GFX10-LABEL: v_icmp_i32_slt: 521; GISEL-GFX10: ; %bb.0: 522; GISEL-GFX10-NEXT: s_clause 0x1 523; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 524; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 525; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 526; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 527; GISEL-GFX10-NEXT: v_cmp_gt_i32_e64 s2, 0x64, s2 528; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 529; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 530; GISEL-GFX10-NEXT: s_endpgm 531 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 40) 532 store i32 %result, ptr addrspace(1) %out 533 ret void 534} 535 536define amdgpu_kernel void @v_icmp_i32_sle(ptr addrspace(1) %out, i32 %src) { 537; SDAG-GFX11-LABEL: v_icmp_i32_sle: 538; SDAG-GFX11: ; %bb.0: 539; SDAG-GFX11-NEXT: s_clause 0x1 540; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 541; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 542; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 543; SDAG-GFX11-NEXT: v_cmp_ge_i32_e64 s2, 0x64, s2 544; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 545; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 546; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 547; SDAG-GFX11-NEXT: s_endpgm 548; 549; SDAG-GFX10-LABEL: v_icmp_i32_sle: 550; SDAG-GFX10: ; %bb.0: 551; SDAG-GFX10-NEXT: s_clause 0x1 552; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 553; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 554; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 555; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 556; SDAG-GFX10-NEXT: v_cmp_ge_i32_e64 s2, 0x64, s2 557; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 558; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 559; SDAG-GFX10-NEXT: s_endpgm 560; 561; GISEL-GFX11-LABEL: v_icmp_i32_sle: 562; GISEL-GFX11: ; %bb.0: 563; GISEL-GFX11-NEXT: s_clause 0x1 564; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 565; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 566; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 567; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 568; GISEL-GFX11-NEXT: v_cmp_ge_i32_e64 s2, 0x64, s2 569; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 570; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 571; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 572; GISEL-GFX11-NEXT: s_endpgm 573; 574; GISEL-GFX10-LABEL: v_icmp_i32_sle: 575; GISEL-GFX10: ; %bb.0: 576; GISEL-GFX10-NEXT: s_clause 0x1 577; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 578; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 579; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 580; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 581; GISEL-GFX10-NEXT: v_cmp_ge_i32_e64 s2, 0x64, s2 582; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 583; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 584; GISEL-GFX10-NEXT: s_endpgm 585 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 41) 586 store i32 %result, ptr addrspace(1) %out 587 ret void 588} 589 590define amdgpu_kernel void @v_icmp_i64_eq(ptr addrspace(1) %out, i64 %src) { 591; SDAG-GFX11-LABEL: v_icmp_i64_eq: 592; SDAG-GFX11: ; %bb.0: 593; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 594; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 595; SDAG-GFX11-NEXT: v_cmp_eq_u64_e64 s2, 0x64, s[2:3] 596; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 597; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 598; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 599; SDAG-GFX11-NEXT: s_endpgm 600; 601; SDAG-GFX10-LABEL: v_icmp_i64_eq: 602; SDAG-GFX10: ; %bb.0: 603; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 604; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 605; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 606; SDAG-GFX10-NEXT: v_cmp_eq_u64_e64 s2, 0x64, s[2:3] 607; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 608; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 609; SDAG-GFX10-NEXT: s_endpgm 610; 611; GISEL-GFX11-LABEL: v_icmp_i64_eq: 612; GISEL-GFX11: ; %bb.0: 613; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 614; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 615; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 616; GISEL-GFX11-NEXT: v_cmp_eq_u64_e64 s2, 0x64, s[2:3] 617; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 618; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 619; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 620; GISEL-GFX11-NEXT: s_endpgm 621; 622; GISEL-GFX10-LABEL: v_icmp_i64_eq: 623; GISEL-GFX10: ; %bb.0: 624; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 625; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 626; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 627; GISEL-GFX10-NEXT: v_cmp_eq_u64_e64 s2, 0x64, s[2:3] 628; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 629; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 630; GISEL-GFX10-NEXT: s_endpgm 631 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 32) 632 store i32 %result, ptr addrspace(1) %out 633 ret void 634} 635 636define amdgpu_kernel void @v_icmp_i64_ne(ptr addrspace(1) %out, i64 %src) { 637; SDAG-GFX11-LABEL: v_icmp_i64_ne: 638; SDAG-GFX11: ; %bb.0: 639; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 640; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 641; SDAG-GFX11-NEXT: v_cmp_ne_u64_e64 s2, 0x64, s[2:3] 642; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 643; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 644; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 645; SDAG-GFX11-NEXT: s_endpgm 646; 647; SDAG-GFX10-LABEL: v_icmp_i64_ne: 648; SDAG-GFX10: ; %bb.0: 649; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 650; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 651; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 652; SDAG-GFX10-NEXT: v_cmp_ne_u64_e64 s2, 0x64, s[2:3] 653; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 654; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 655; SDAG-GFX10-NEXT: s_endpgm 656; 657; GISEL-GFX11-LABEL: v_icmp_i64_ne: 658; GISEL-GFX11: ; %bb.0: 659; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 660; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 661; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 662; GISEL-GFX11-NEXT: v_cmp_ne_u64_e64 s2, 0x64, s[2:3] 663; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 664; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 665; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 666; GISEL-GFX11-NEXT: s_endpgm 667; 668; GISEL-GFX10-LABEL: v_icmp_i64_ne: 669; GISEL-GFX10: ; %bb.0: 670; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 671; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 672; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 673; GISEL-GFX10-NEXT: v_cmp_ne_u64_e64 s2, 0x64, s[2:3] 674; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 675; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 676; GISEL-GFX10-NEXT: s_endpgm 677 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 33) 678 store i32 %result, ptr addrspace(1) %out 679 ret void 680} 681 682define amdgpu_kernel void @v_icmp_u64_ugt(ptr addrspace(1) %out, i64 %src) { 683; SDAG-GFX11-LABEL: v_icmp_u64_ugt: 684; SDAG-GFX11: ; %bb.0: 685; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 686; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 687; SDAG-GFX11-NEXT: v_cmp_lt_u64_e64 s2, 0x64, s[2:3] 688; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 689; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 690; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 691; SDAG-GFX11-NEXT: s_endpgm 692; 693; SDAG-GFX10-LABEL: v_icmp_u64_ugt: 694; SDAG-GFX10: ; %bb.0: 695; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 696; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 697; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 698; SDAG-GFX10-NEXT: v_cmp_lt_u64_e64 s2, 0x64, s[2:3] 699; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 700; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 701; SDAG-GFX10-NEXT: s_endpgm 702; 703; GISEL-GFX11-LABEL: v_icmp_u64_ugt: 704; GISEL-GFX11: ; %bb.0: 705; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 706; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 707; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 708; GISEL-GFX11-NEXT: v_cmp_lt_u64_e64 s2, 0x64, s[2:3] 709; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 710; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 711; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 712; GISEL-GFX11-NEXT: s_endpgm 713; 714; GISEL-GFX10-LABEL: v_icmp_u64_ugt: 715; GISEL-GFX10: ; %bb.0: 716; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 717; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 718; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 719; GISEL-GFX10-NEXT: v_cmp_lt_u64_e64 s2, 0x64, s[2:3] 720; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 721; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 722; GISEL-GFX10-NEXT: s_endpgm 723 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 34) 724 store i32 %result, ptr addrspace(1) %out 725 ret void 726} 727 728define amdgpu_kernel void @v_icmp_u64_uge(ptr addrspace(1) %out, i64 %src) { 729; SDAG-GFX11-LABEL: v_icmp_u64_uge: 730; SDAG-GFX11: ; %bb.0: 731; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 732; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 733; SDAG-GFX11-NEXT: v_cmp_le_u64_e64 s2, 0x64, s[2:3] 734; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 735; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 736; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 737; SDAG-GFX11-NEXT: s_endpgm 738; 739; SDAG-GFX10-LABEL: v_icmp_u64_uge: 740; SDAG-GFX10: ; %bb.0: 741; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 742; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 743; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 744; SDAG-GFX10-NEXT: v_cmp_le_u64_e64 s2, 0x64, s[2:3] 745; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 746; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 747; SDAG-GFX10-NEXT: s_endpgm 748; 749; GISEL-GFX11-LABEL: v_icmp_u64_uge: 750; GISEL-GFX11: ; %bb.0: 751; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 752; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 753; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 754; GISEL-GFX11-NEXT: v_cmp_le_u64_e64 s2, 0x64, s[2:3] 755; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 756; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 757; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 758; GISEL-GFX11-NEXT: s_endpgm 759; 760; GISEL-GFX10-LABEL: v_icmp_u64_uge: 761; GISEL-GFX10: ; %bb.0: 762; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 763; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 764; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 765; GISEL-GFX10-NEXT: v_cmp_le_u64_e64 s2, 0x64, s[2:3] 766; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 767; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 768; GISEL-GFX10-NEXT: s_endpgm 769 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 35) 770 store i32 %result, ptr addrspace(1) %out 771 ret void 772} 773 774define amdgpu_kernel void @v_icmp_u64_ult(ptr addrspace(1) %out, i64 %src) { 775; SDAG-GFX11-LABEL: v_icmp_u64_ult: 776; SDAG-GFX11: ; %bb.0: 777; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 778; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 779; SDAG-GFX11-NEXT: v_cmp_gt_u64_e64 s2, 0x64, s[2:3] 780; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 781; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 782; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 783; SDAG-GFX11-NEXT: s_endpgm 784; 785; SDAG-GFX10-LABEL: v_icmp_u64_ult: 786; SDAG-GFX10: ; %bb.0: 787; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 788; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 789; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 790; SDAG-GFX10-NEXT: v_cmp_gt_u64_e64 s2, 0x64, s[2:3] 791; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 792; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 793; SDAG-GFX10-NEXT: s_endpgm 794; 795; GISEL-GFX11-LABEL: v_icmp_u64_ult: 796; GISEL-GFX11: ; %bb.0: 797; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 798; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 799; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 800; GISEL-GFX11-NEXT: v_cmp_gt_u64_e64 s2, 0x64, s[2:3] 801; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 802; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 803; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 804; GISEL-GFX11-NEXT: s_endpgm 805; 806; GISEL-GFX10-LABEL: v_icmp_u64_ult: 807; GISEL-GFX10: ; %bb.0: 808; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 809; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 810; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 811; GISEL-GFX10-NEXT: v_cmp_gt_u64_e64 s2, 0x64, s[2:3] 812; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 813; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 814; GISEL-GFX10-NEXT: s_endpgm 815 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 36) 816 store i32 %result, ptr addrspace(1) %out 817 ret void 818} 819 820define amdgpu_kernel void @v_icmp_u64_ule(ptr addrspace(1) %out, i64 %src) { 821; SDAG-GFX11-LABEL: v_icmp_u64_ule: 822; SDAG-GFX11: ; %bb.0: 823; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 824; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 825; SDAG-GFX11-NEXT: v_cmp_ge_u64_e64 s2, 0x64, s[2:3] 826; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 827; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 828; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 829; SDAG-GFX11-NEXT: s_endpgm 830; 831; SDAG-GFX10-LABEL: v_icmp_u64_ule: 832; SDAG-GFX10: ; %bb.0: 833; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 834; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 835; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 836; SDAG-GFX10-NEXT: v_cmp_ge_u64_e64 s2, 0x64, s[2:3] 837; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 838; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 839; SDAG-GFX10-NEXT: s_endpgm 840; 841; GISEL-GFX11-LABEL: v_icmp_u64_ule: 842; GISEL-GFX11: ; %bb.0: 843; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 844; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 845; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 846; GISEL-GFX11-NEXT: v_cmp_ge_u64_e64 s2, 0x64, s[2:3] 847; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 848; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 849; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 850; GISEL-GFX11-NEXT: s_endpgm 851; 852; GISEL-GFX10-LABEL: v_icmp_u64_ule: 853; GISEL-GFX10: ; %bb.0: 854; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 855; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 856; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 857; GISEL-GFX10-NEXT: v_cmp_ge_u64_e64 s2, 0x64, s[2:3] 858; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 859; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 860; GISEL-GFX10-NEXT: s_endpgm 861 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 37) 862 store i32 %result, ptr addrspace(1) %out 863 ret void 864} 865 866define amdgpu_kernel void @v_icmp_i64_sgt(ptr addrspace(1) %out, i64 %src) { 867; SDAG-GFX11-LABEL: v_icmp_i64_sgt: 868; SDAG-GFX11: ; %bb.0: 869; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 870; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 871; SDAG-GFX11-NEXT: v_cmp_lt_i64_e64 s2, 0x64, s[2:3] 872; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 873; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 874; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 875; SDAG-GFX11-NEXT: s_endpgm 876; 877; SDAG-GFX10-LABEL: v_icmp_i64_sgt: 878; SDAG-GFX10: ; %bb.0: 879; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 880; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 881; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 882; SDAG-GFX10-NEXT: v_cmp_lt_i64_e64 s2, 0x64, s[2:3] 883; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 884; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 885; SDAG-GFX10-NEXT: s_endpgm 886; 887; GISEL-GFX11-LABEL: v_icmp_i64_sgt: 888; GISEL-GFX11: ; %bb.0: 889; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 890; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 891; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 892; GISEL-GFX11-NEXT: v_cmp_lt_i64_e64 s2, 0x64, s[2:3] 893; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 894; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 895; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 896; GISEL-GFX11-NEXT: s_endpgm 897; 898; GISEL-GFX10-LABEL: v_icmp_i64_sgt: 899; GISEL-GFX10: ; %bb.0: 900; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 901; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 902; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 903; GISEL-GFX10-NEXT: v_cmp_lt_i64_e64 s2, 0x64, s[2:3] 904; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 905; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 906; GISEL-GFX10-NEXT: s_endpgm 907 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 38) 908 store i32 %result, ptr addrspace(1) %out 909 ret void 910} 911 912define amdgpu_kernel void @v_icmp_i64_sge(ptr addrspace(1) %out, i64 %src) { 913; SDAG-GFX11-LABEL: v_icmp_i64_sge: 914; SDAG-GFX11: ; %bb.0: 915; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 916; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 917; SDAG-GFX11-NEXT: v_cmp_le_i64_e64 s2, 0x64, s[2:3] 918; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 919; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 920; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 921; SDAG-GFX11-NEXT: s_endpgm 922; 923; SDAG-GFX10-LABEL: v_icmp_i64_sge: 924; SDAG-GFX10: ; %bb.0: 925; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 926; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 927; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 928; SDAG-GFX10-NEXT: v_cmp_le_i64_e64 s2, 0x64, s[2:3] 929; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 930; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 931; SDAG-GFX10-NEXT: s_endpgm 932; 933; GISEL-GFX11-LABEL: v_icmp_i64_sge: 934; GISEL-GFX11: ; %bb.0: 935; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 936; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 937; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 938; GISEL-GFX11-NEXT: v_cmp_le_i64_e64 s2, 0x64, s[2:3] 939; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 940; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 941; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 942; GISEL-GFX11-NEXT: s_endpgm 943; 944; GISEL-GFX10-LABEL: v_icmp_i64_sge: 945; GISEL-GFX10: ; %bb.0: 946; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 947; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 948; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 949; GISEL-GFX10-NEXT: v_cmp_le_i64_e64 s2, 0x64, s[2:3] 950; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 951; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 952; GISEL-GFX10-NEXT: s_endpgm 953 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 39) 954 store i32 %result, ptr addrspace(1) %out 955 ret void 956} 957 958define amdgpu_kernel void @v_icmp_i64_slt(ptr addrspace(1) %out, i64 %src) { 959; SDAG-GFX11-LABEL: v_icmp_i64_slt: 960; SDAG-GFX11: ; %bb.0: 961; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 962; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 963; SDAG-GFX11-NEXT: v_cmp_gt_i64_e64 s2, 0x64, s[2:3] 964; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 965; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 966; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 967; SDAG-GFX11-NEXT: s_endpgm 968; 969; SDAG-GFX10-LABEL: v_icmp_i64_slt: 970; SDAG-GFX10: ; %bb.0: 971; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 972; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 973; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 974; SDAG-GFX10-NEXT: v_cmp_gt_i64_e64 s2, 0x64, s[2:3] 975; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 976; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 977; SDAG-GFX10-NEXT: s_endpgm 978; 979; GISEL-GFX11-LABEL: v_icmp_i64_slt: 980; GISEL-GFX11: ; %bb.0: 981; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 982; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 983; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 984; GISEL-GFX11-NEXT: v_cmp_gt_i64_e64 s2, 0x64, s[2:3] 985; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 986; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 987; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 988; GISEL-GFX11-NEXT: s_endpgm 989; 990; GISEL-GFX10-LABEL: v_icmp_i64_slt: 991; GISEL-GFX10: ; %bb.0: 992; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 993; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 994; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 995; GISEL-GFX10-NEXT: v_cmp_gt_i64_e64 s2, 0x64, s[2:3] 996; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 997; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 998; GISEL-GFX10-NEXT: s_endpgm 999 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 40) 1000 store i32 %result, ptr addrspace(1) %out 1001 ret void 1002} 1003 1004define amdgpu_kernel void @v_icmp_i64_sle(ptr addrspace(1) %out, i64 %src) { 1005; SDAG-GFX11-LABEL: v_icmp_i64_sle: 1006; SDAG-GFX11: ; %bb.0: 1007; SDAG-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1008; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1009; SDAG-GFX11-NEXT: v_cmp_ge_i64_e64 s2, 0x64, s[2:3] 1010; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1011; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1012; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1013; SDAG-GFX11-NEXT: s_endpgm 1014; 1015; SDAG-GFX10-LABEL: v_icmp_i64_sle: 1016; SDAG-GFX10: ; %bb.0: 1017; SDAG-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1018; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1019; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1020; SDAG-GFX10-NEXT: v_cmp_ge_i64_e64 s2, 0x64, s[2:3] 1021; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1022; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1023; SDAG-GFX10-NEXT: s_endpgm 1024; 1025; GISEL-GFX11-LABEL: v_icmp_i64_sle: 1026; GISEL-GFX11: ; %bb.0: 1027; GISEL-GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1028; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1029; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1030; GISEL-GFX11-NEXT: v_cmp_ge_i64_e64 s2, 0x64, s[2:3] 1031; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1032; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1033; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1034; GISEL-GFX11-NEXT: s_endpgm 1035; 1036; GISEL-GFX10-LABEL: v_icmp_i64_sle: 1037; GISEL-GFX10: ; %bb.0: 1038; GISEL-GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1039; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1040; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1041; GISEL-GFX10-NEXT: v_cmp_ge_i64_e64 s2, 0x64, s[2:3] 1042; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1043; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1044; GISEL-GFX10-NEXT: s_endpgm 1045 %result = call i32 @llvm.amdgcn.icmp.i64(i64 %src, i64 100, i32 41) 1046 store i32 %result, ptr addrspace(1) %out 1047 ret void 1048} 1049 1050define amdgpu_kernel void @v_icmp_i16_eq(ptr addrspace(1) %out, i16 %src) { 1051; SDAG-GFX11-LABEL: v_icmp_i16_eq: 1052; SDAG-GFX11: ; %bb.0: 1053; SDAG-GFX11-NEXT: s_clause 0x1 1054; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1055; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1056; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1057; SDAG-GFX11-NEXT: v_cmp_eq_u16_e64 s2, 0x64, s2 1058; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1059; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1060; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1061; SDAG-GFX11-NEXT: s_endpgm 1062; 1063; SDAG-GFX10-LABEL: v_icmp_i16_eq: 1064; SDAG-GFX10: ; %bb.0: 1065; SDAG-GFX10-NEXT: s_clause 0x1 1066; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1067; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1068; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1069; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1070; SDAG-GFX10-NEXT: v_cmp_eq_u16_e64 s2, 0x64, s2 1071; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1072; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1073; SDAG-GFX10-NEXT: s_endpgm 1074; 1075; GISEL-GFX11-LABEL: v_icmp_i16_eq: 1076; GISEL-GFX11: ; %bb.0: 1077; GISEL-GFX11-NEXT: s_clause 0x1 1078; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1079; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1080; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1081; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1082; GISEL-GFX11-NEXT: v_cmp_eq_u16_e64 s2, 0x64, s2 1083; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1084; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1085; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1086; GISEL-GFX11-NEXT: s_endpgm 1087; 1088; GISEL-GFX10-LABEL: v_icmp_i16_eq: 1089; GISEL-GFX10: ; %bb.0: 1090; GISEL-GFX10-NEXT: s_clause 0x1 1091; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1092; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1093; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1094; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1095; GISEL-GFX10-NEXT: v_cmp_eq_u16_e64 s2, 0x64, s2 1096; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1097; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1098; GISEL-GFX10-NEXT: s_endpgm 1099 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 32) 1100 store i32 %result, ptr addrspace(1) %out 1101 ret void 1102} 1103 1104define amdgpu_kernel void @v_icmp_i16(ptr addrspace(1) %out, i16 %src) { 1105; SDAG-GFX11-LABEL: v_icmp_i16: 1106; SDAG-GFX11: ; %bb.0: 1107; SDAG-GFX11-NEXT: s_endpgm 1108; 1109; SDAG-GFX10-LABEL: v_icmp_i16: 1110; SDAG-GFX10: ; %bb.0: 1111; SDAG-GFX10-NEXT: s_endpgm 1112; 1113; GISEL-GFX11-LABEL: v_icmp_i16: 1114; GISEL-GFX11: ; %bb.0: 1115; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1116; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0 1117; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1118; GISEL-GFX11-NEXT: global_store_b32 v0, v0, s[0:1] 1119; GISEL-GFX11-NEXT: s_endpgm 1120; 1121; GISEL-GFX10-LABEL: v_icmp_i16: 1122; GISEL-GFX10: ; %bb.0: 1123; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1124; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0 1125; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1126; GISEL-GFX10-NEXT: global_store_dword v0, v0, s[0:1] 1127; GISEL-GFX10-NEXT: s_endpgm 1128 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 30) 1129 store i32 %result, ptr addrspace(1) %out 1130 ret void 1131} 1132 1133define amdgpu_kernel void @v_icmp_i16_ne(ptr addrspace(1) %out, i16 %src) { 1134; SDAG-GFX11-LABEL: v_icmp_i16_ne: 1135; SDAG-GFX11: ; %bb.0: 1136; SDAG-GFX11-NEXT: s_clause 0x1 1137; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1138; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1139; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1140; SDAG-GFX11-NEXT: v_cmp_ne_u16_e64 s2, 0x64, s2 1141; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1142; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1143; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1144; SDAG-GFX11-NEXT: s_endpgm 1145; 1146; SDAG-GFX10-LABEL: v_icmp_i16_ne: 1147; SDAG-GFX10: ; %bb.0: 1148; SDAG-GFX10-NEXT: s_clause 0x1 1149; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1150; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1151; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1152; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1153; SDAG-GFX10-NEXT: v_cmp_ne_u16_e64 s2, 0x64, s2 1154; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1155; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1156; SDAG-GFX10-NEXT: s_endpgm 1157; 1158; GISEL-GFX11-LABEL: v_icmp_i16_ne: 1159; GISEL-GFX11: ; %bb.0: 1160; GISEL-GFX11-NEXT: s_clause 0x1 1161; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1162; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1163; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1164; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1165; GISEL-GFX11-NEXT: v_cmp_ne_u16_e64 s2, 0x64, s2 1166; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1167; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1168; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1169; GISEL-GFX11-NEXT: s_endpgm 1170; 1171; GISEL-GFX10-LABEL: v_icmp_i16_ne: 1172; GISEL-GFX10: ; %bb.0: 1173; GISEL-GFX10-NEXT: s_clause 0x1 1174; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1175; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1176; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1177; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1178; GISEL-GFX10-NEXT: v_cmp_ne_u16_e64 s2, 0x64, s2 1179; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1180; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1181; GISEL-GFX10-NEXT: s_endpgm 1182 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 33) 1183 store i32 %result, ptr addrspace(1) %out 1184 ret void 1185} 1186 1187define amdgpu_kernel void @v_icmp_i16_ugt(ptr addrspace(1) %out, i16 %src) { 1188; SDAG-GFX11-LABEL: v_icmp_i16_ugt: 1189; SDAG-GFX11: ; %bb.0: 1190; SDAG-GFX11-NEXT: s_clause 0x1 1191; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1192; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1193; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1194; SDAG-GFX11-NEXT: v_cmp_lt_u16_e64 s2, 0x64, s2 1195; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1196; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1197; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1198; SDAG-GFX11-NEXT: s_endpgm 1199; 1200; SDAG-GFX10-LABEL: v_icmp_i16_ugt: 1201; SDAG-GFX10: ; %bb.0: 1202; SDAG-GFX10-NEXT: s_clause 0x1 1203; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1204; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1205; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1206; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1207; SDAG-GFX10-NEXT: v_cmp_lt_u16_e64 s2, 0x64, s2 1208; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1209; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1210; SDAG-GFX10-NEXT: s_endpgm 1211; 1212; GISEL-GFX11-LABEL: v_icmp_i16_ugt: 1213; GISEL-GFX11: ; %bb.0: 1214; GISEL-GFX11-NEXT: s_clause 0x1 1215; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1216; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1217; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1218; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1219; GISEL-GFX11-NEXT: v_cmp_lt_u16_e64 s2, 0x64, s2 1220; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1221; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1222; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1223; GISEL-GFX11-NEXT: s_endpgm 1224; 1225; GISEL-GFX10-LABEL: v_icmp_i16_ugt: 1226; GISEL-GFX10: ; %bb.0: 1227; GISEL-GFX10-NEXT: s_clause 0x1 1228; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1229; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1230; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1231; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1232; GISEL-GFX10-NEXT: v_cmp_lt_u16_e64 s2, 0x64, s2 1233; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1234; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1235; GISEL-GFX10-NEXT: s_endpgm 1236 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 34) 1237 store i32 %result, ptr addrspace(1) %out 1238 ret void 1239} 1240 1241define amdgpu_kernel void @v_icmp_i16_uge(ptr addrspace(1) %out, i16 %src) { 1242; SDAG-GFX11-LABEL: v_icmp_i16_uge: 1243; SDAG-GFX11: ; %bb.0: 1244; SDAG-GFX11-NEXT: s_clause 0x1 1245; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1246; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1247; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1248; SDAG-GFX11-NEXT: v_cmp_le_u16_e64 s2, 0x64, s2 1249; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1250; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1251; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1252; SDAG-GFX11-NEXT: s_endpgm 1253; 1254; SDAG-GFX10-LABEL: v_icmp_i16_uge: 1255; SDAG-GFX10: ; %bb.0: 1256; SDAG-GFX10-NEXT: s_clause 0x1 1257; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1258; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1259; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1260; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1261; SDAG-GFX10-NEXT: v_cmp_le_u16_e64 s2, 0x64, s2 1262; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1263; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1264; SDAG-GFX10-NEXT: s_endpgm 1265; 1266; GISEL-GFX11-LABEL: v_icmp_i16_uge: 1267; GISEL-GFX11: ; %bb.0: 1268; GISEL-GFX11-NEXT: s_clause 0x1 1269; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1270; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1271; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1272; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1273; GISEL-GFX11-NEXT: v_cmp_le_u16_e64 s2, 0x64, s2 1274; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1275; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1276; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1277; GISEL-GFX11-NEXT: s_endpgm 1278; 1279; GISEL-GFX10-LABEL: v_icmp_i16_uge: 1280; GISEL-GFX10: ; %bb.0: 1281; GISEL-GFX10-NEXT: s_clause 0x1 1282; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1283; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1284; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1285; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1286; GISEL-GFX10-NEXT: v_cmp_le_u16_e64 s2, 0x64, s2 1287; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1288; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1289; GISEL-GFX10-NEXT: s_endpgm 1290 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 35) 1291 store i32 %result, ptr addrspace(1) %out 1292 ret void 1293} 1294 1295define amdgpu_kernel void @v_icmp_i16_ult(ptr addrspace(1) %out, i16 %src) { 1296; SDAG-GFX11-LABEL: v_icmp_i16_ult: 1297; SDAG-GFX11: ; %bb.0: 1298; SDAG-GFX11-NEXT: s_clause 0x1 1299; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1300; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1301; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1302; SDAG-GFX11-NEXT: v_cmp_gt_u16_e64 s2, 0x64, s2 1303; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1304; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1305; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1306; SDAG-GFX11-NEXT: s_endpgm 1307; 1308; SDAG-GFX10-LABEL: v_icmp_i16_ult: 1309; SDAG-GFX10: ; %bb.0: 1310; SDAG-GFX10-NEXT: s_clause 0x1 1311; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1312; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1313; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1314; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1315; SDAG-GFX10-NEXT: v_cmp_gt_u16_e64 s2, 0x64, s2 1316; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1317; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1318; SDAG-GFX10-NEXT: s_endpgm 1319; 1320; GISEL-GFX11-LABEL: v_icmp_i16_ult: 1321; GISEL-GFX11: ; %bb.0: 1322; GISEL-GFX11-NEXT: s_clause 0x1 1323; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1324; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1325; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1326; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1327; GISEL-GFX11-NEXT: v_cmp_gt_u16_e64 s2, 0x64, s2 1328; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1329; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1330; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1331; GISEL-GFX11-NEXT: s_endpgm 1332; 1333; GISEL-GFX10-LABEL: v_icmp_i16_ult: 1334; GISEL-GFX10: ; %bb.0: 1335; GISEL-GFX10-NEXT: s_clause 0x1 1336; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1337; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1338; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1339; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1340; GISEL-GFX10-NEXT: v_cmp_gt_u16_e64 s2, 0x64, s2 1341; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1342; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1343; GISEL-GFX10-NEXT: s_endpgm 1344 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 36) 1345 store i32 %result, ptr addrspace(1) %out 1346 ret void 1347} 1348 1349define amdgpu_kernel void @v_icmp_i16_ule(ptr addrspace(1) %out, i16 %src) { 1350; SDAG-GFX11-LABEL: v_icmp_i16_ule: 1351; SDAG-GFX11: ; %bb.0: 1352; SDAG-GFX11-NEXT: s_clause 0x1 1353; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1354; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1355; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1356; SDAG-GFX11-NEXT: v_cmp_ge_u16_e64 s2, 0x64, s2 1357; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1358; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1359; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1360; SDAG-GFX11-NEXT: s_endpgm 1361; 1362; SDAG-GFX10-LABEL: v_icmp_i16_ule: 1363; SDAG-GFX10: ; %bb.0: 1364; SDAG-GFX10-NEXT: s_clause 0x1 1365; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1366; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1367; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1368; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1369; SDAG-GFX10-NEXT: v_cmp_ge_u16_e64 s2, 0x64, s2 1370; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1371; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1372; SDAG-GFX10-NEXT: s_endpgm 1373; 1374; GISEL-GFX11-LABEL: v_icmp_i16_ule: 1375; GISEL-GFX11: ; %bb.0: 1376; GISEL-GFX11-NEXT: s_clause 0x1 1377; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1378; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1379; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1380; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1381; GISEL-GFX11-NEXT: v_cmp_ge_u16_e64 s2, 0x64, s2 1382; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1383; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1384; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1385; GISEL-GFX11-NEXT: s_endpgm 1386; 1387; GISEL-GFX10-LABEL: v_icmp_i16_ule: 1388; GISEL-GFX10: ; %bb.0: 1389; GISEL-GFX10-NEXT: s_clause 0x1 1390; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1391; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1392; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1393; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1394; GISEL-GFX10-NEXT: v_cmp_ge_u16_e64 s2, 0x64, s2 1395; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1396; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1397; GISEL-GFX10-NEXT: s_endpgm 1398 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 37) 1399 store i32 %result, ptr addrspace(1) %out 1400 ret void 1401} 1402 1403define amdgpu_kernel void @v_icmp_i16_sgt(ptr addrspace(1) %out, i16 %src) #1 { 1404; SDAG-GFX11-LABEL: v_icmp_i16_sgt: 1405; SDAG-GFX11: ; %bb.0: 1406; SDAG-GFX11-NEXT: s_clause 0x1 1407; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1408; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1409; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1410; SDAG-GFX11-NEXT: v_cmp_lt_i16_e64 s2, 0x64, s2 1411; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1412; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1413; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1414; SDAG-GFX11-NEXT: s_endpgm 1415; 1416; SDAG-GFX10-LABEL: v_icmp_i16_sgt: 1417; SDAG-GFX10: ; %bb.0: 1418; SDAG-GFX10-NEXT: s_clause 0x1 1419; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1420; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1421; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1422; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1423; SDAG-GFX10-NEXT: v_cmp_lt_i16_e64 s2, 0x64, s2 1424; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1425; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1426; SDAG-GFX10-NEXT: s_endpgm 1427; 1428; GISEL-GFX11-LABEL: v_icmp_i16_sgt: 1429; GISEL-GFX11: ; %bb.0: 1430; GISEL-GFX11-NEXT: s_clause 0x1 1431; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1432; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1433; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1434; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1435; GISEL-GFX11-NEXT: v_cmp_lt_i16_e64 s2, 0x64, s2 1436; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1437; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1438; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1439; GISEL-GFX11-NEXT: s_endpgm 1440; 1441; GISEL-GFX10-LABEL: v_icmp_i16_sgt: 1442; GISEL-GFX10: ; %bb.0: 1443; GISEL-GFX10-NEXT: s_clause 0x1 1444; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1445; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1446; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1447; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1448; GISEL-GFX10-NEXT: v_cmp_lt_i16_e64 s2, 0x64, s2 1449; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1450; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1451; GISEL-GFX10-NEXT: s_endpgm 1452 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 38) 1453 store i32 %result, ptr addrspace(1) %out 1454 ret void 1455} 1456 1457define amdgpu_kernel void @v_icmp_i16_sge(ptr addrspace(1) %out, i16 %src) { 1458; SDAG-GFX11-LABEL: v_icmp_i16_sge: 1459; SDAG-GFX11: ; %bb.0: 1460; SDAG-GFX11-NEXT: s_clause 0x1 1461; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1462; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1463; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1464; SDAG-GFX11-NEXT: v_cmp_le_i16_e64 s2, 0x64, s2 1465; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1466; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1467; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1468; SDAG-GFX11-NEXT: s_endpgm 1469; 1470; SDAG-GFX10-LABEL: v_icmp_i16_sge: 1471; SDAG-GFX10: ; %bb.0: 1472; SDAG-GFX10-NEXT: s_clause 0x1 1473; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1474; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1475; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1476; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1477; SDAG-GFX10-NEXT: v_cmp_le_i16_e64 s2, 0x64, s2 1478; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1479; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1480; SDAG-GFX10-NEXT: s_endpgm 1481; 1482; GISEL-GFX11-LABEL: v_icmp_i16_sge: 1483; GISEL-GFX11: ; %bb.0: 1484; GISEL-GFX11-NEXT: s_clause 0x1 1485; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1486; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1487; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1488; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1489; GISEL-GFX11-NEXT: v_cmp_le_i16_e64 s2, 0x64, s2 1490; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1491; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1492; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1493; GISEL-GFX11-NEXT: s_endpgm 1494; 1495; GISEL-GFX10-LABEL: v_icmp_i16_sge: 1496; GISEL-GFX10: ; %bb.0: 1497; GISEL-GFX10-NEXT: s_clause 0x1 1498; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1499; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1500; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1501; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1502; GISEL-GFX10-NEXT: v_cmp_le_i16_e64 s2, 0x64, s2 1503; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1504; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1505; GISEL-GFX10-NEXT: s_endpgm 1506 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 39) 1507 store i32 %result, ptr addrspace(1) %out 1508 ret void 1509} 1510 1511define amdgpu_kernel void @v_icmp_i16_slt(ptr addrspace(1) %out, i16 %src) { 1512; SDAG-GFX11-LABEL: v_icmp_i16_slt: 1513; SDAG-GFX11: ; %bb.0: 1514; SDAG-GFX11-NEXT: s_clause 0x1 1515; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1516; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1517; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1518; SDAG-GFX11-NEXT: v_cmp_gt_i16_e64 s2, 0x64, s2 1519; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1520; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1521; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1522; SDAG-GFX11-NEXT: s_endpgm 1523; 1524; SDAG-GFX10-LABEL: v_icmp_i16_slt: 1525; SDAG-GFX10: ; %bb.0: 1526; SDAG-GFX10-NEXT: s_clause 0x1 1527; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1528; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1529; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1530; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1531; SDAG-GFX10-NEXT: v_cmp_gt_i16_e64 s2, 0x64, s2 1532; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1533; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1534; SDAG-GFX10-NEXT: s_endpgm 1535; 1536; GISEL-GFX11-LABEL: v_icmp_i16_slt: 1537; GISEL-GFX11: ; %bb.0: 1538; GISEL-GFX11-NEXT: s_clause 0x1 1539; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1540; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1541; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1542; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1543; GISEL-GFX11-NEXT: v_cmp_gt_i16_e64 s2, 0x64, s2 1544; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1545; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1546; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1547; GISEL-GFX11-NEXT: s_endpgm 1548; 1549; GISEL-GFX10-LABEL: v_icmp_i16_slt: 1550; GISEL-GFX10: ; %bb.0: 1551; GISEL-GFX10-NEXT: s_clause 0x1 1552; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1553; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1554; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1555; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1556; GISEL-GFX10-NEXT: v_cmp_gt_i16_e64 s2, 0x64, s2 1557; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1558; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1559; GISEL-GFX10-NEXT: s_endpgm 1560 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 40) 1561 store i32 %result, ptr addrspace(1) %out 1562 ret void 1563} 1564 1565define amdgpu_kernel void @v_icmp_i16_sle(ptr addrspace(1) %out, i16 %src) { 1566; SDAG-GFX11-LABEL: v_icmp_i16_sle: 1567; SDAG-GFX11: ; %bb.0: 1568; SDAG-GFX11-NEXT: s_clause 0x1 1569; SDAG-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1570; SDAG-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1571; SDAG-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1572; SDAG-GFX11-NEXT: v_cmp_ge_i16_e64 s2, 0x64, s2 1573; SDAG-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1574; SDAG-GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1575; SDAG-GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1576; SDAG-GFX11-NEXT: s_endpgm 1577; 1578; SDAG-GFX10-LABEL: v_icmp_i16_sle: 1579; SDAG-GFX10: ; %bb.0: 1580; SDAG-GFX10-NEXT: s_clause 0x1 1581; SDAG-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1582; SDAG-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1583; SDAG-GFX10-NEXT: v_mov_b32_e32 v0, 0 1584; SDAG-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1585; SDAG-GFX10-NEXT: v_cmp_ge_i16_e64 s2, 0x64, s2 1586; SDAG-GFX10-NEXT: v_mov_b32_e32 v1, s2 1587; SDAG-GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1588; SDAG-GFX10-NEXT: s_endpgm 1589; 1590; GISEL-GFX11-LABEL: v_icmp_i16_sle: 1591; GISEL-GFX11: ; %bb.0: 1592; GISEL-GFX11-NEXT: s_clause 0x1 1593; GISEL-GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c 1594; GISEL-GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 1595; GISEL-GFX11-NEXT: v_mov_b32_e32 v1, 0 1596; GISEL-GFX11-NEXT: s_waitcnt lgkmcnt(0) 1597; GISEL-GFX11-NEXT: v_cmp_ge_i16_e64 s2, 0x64, s2 1598; GISEL-GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1599; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, s2 1600; GISEL-GFX11-NEXT: global_store_b32 v1, v0, s[0:1] 1601; GISEL-GFX11-NEXT: s_endpgm 1602; 1603; GISEL-GFX10-LABEL: v_icmp_i16_sle: 1604; GISEL-GFX10: ; %bb.0: 1605; GISEL-GFX10-NEXT: s_clause 0x1 1606; GISEL-GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c 1607; GISEL-GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 1608; GISEL-GFX10-NEXT: v_mov_b32_e32 v1, 0 1609; GISEL-GFX10-NEXT: s_waitcnt lgkmcnt(0) 1610; GISEL-GFX10-NEXT: v_cmp_ge_i16_e64 s2, 0x64, s2 1611; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, s2 1612; GISEL-GFX10-NEXT: global_store_dword v1, v0, s[0:1] 1613; GISEL-GFX10-NEXT: s_endpgm 1614 %result = call i32 @llvm.amdgcn.icmp.i16(i16 %src, i16 100, i32 41) 1615 store i32 %result, ptr addrspace(1) %out 1616 ret void 1617} 1618 1619define amdgpu_kernel void @v_icmp_i1_ne0(ptr addrspace(1) %out, i32 %a, i32 %b) { 1620; GFX11-LABEL: v_icmp_i1_ne0: 1621; GFX11: ; %bb.0: 1622; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 1623; GFX11-NEXT: s_waitcnt lgkmcnt(0) 1624; GFX11-NEXT: s_cmp_gt_u32 s2, 1 1625; GFX11-NEXT: s_cselect_b32 s2, -1, 0 1626; GFX11-NEXT: s_cmp_gt_u32 s3, 2 1627; GFX11-NEXT: s_cselect_b32 s3, -1, 0 1628; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1) 1629; GFX11-NEXT: s_and_b32 s2, s2, s3 1630; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2 1631; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 1632; GFX11-NEXT: s_endpgm 1633; 1634; GFX10-LABEL: v_icmp_i1_ne0: 1635; GFX10: ; %bb.0: 1636; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 1637; GFX10-NEXT: v_mov_b32_e32 v0, 0 1638; GFX10-NEXT: s_waitcnt lgkmcnt(0) 1639; GFX10-NEXT: s_cmp_gt_u32 s2, 1 1640; GFX10-NEXT: s_cselect_b32 s2, -1, 0 1641; GFX10-NEXT: s_cmp_gt_u32 s3, 2 1642; GFX10-NEXT: s_cselect_b32 s3, -1, 0 1643; GFX10-NEXT: s_and_b32 s2, s2, s3 1644; GFX10-NEXT: v_mov_b32_e32 v1, s2 1645; GFX10-NEXT: global_store_dword v0, v1, s[0:1] 1646; GFX10-NEXT: s_endpgm 1647 %c0 = icmp ugt i32 %a, 1 1648 %c1 = icmp ugt i32 %b, 2 1649 %src = and i1 %c0, %c1 1650 %result = call i32 @llvm.amdgcn.icmp.i1(i1 %src, i1 false, i32 33) 1651 store i32 %result, ptr addrspace(1) %out 1652 ret void 1653} 1654 1655define amdgpu_ps void @test_intr_icmp_i32_invalid_cc(ptr addrspace(1) %out, i32 %src) { 1656; SDAG-GFX11-LABEL: test_intr_icmp_i32_invalid_cc: 1657; SDAG-GFX11: ; %bb.0: 1658; SDAG-GFX11-NEXT: s_endpgm 1659; 1660; SDAG-GFX10-LABEL: test_intr_icmp_i32_invalid_cc: 1661; SDAG-GFX10: ; %bb.0: 1662; SDAG-GFX10-NEXT: s_endpgm 1663; 1664; GISEL-GFX11-LABEL: test_intr_icmp_i32_invalid_cc: 1665; GISEL-GFX11: ; %bb.0: 1666; GISEL-GFX11-NEXT: global_store_b32 v[0:1], v0, off 1667; GISEL-GFX11-NEXT: s_endpgm 1668; 1669; GISEL-GFX10-LABEL: test_intr_icmp_i32_invalid_cc: 1670; GISEL-GFX10: ; %bb.0: 1671; GISEL-GFX10-NEXT: global_store_dword v[0:1], v0, off 1672; GISEL-GFX10-NEXT: s_endpgm 1673 %result = call i32 @llvm.amdgcn.icmp.i32(i32 %src, i32 100, i32 9999) 1674 store i32 %result, ptr addrspace(1) %out 1675 ret void 1676} 1677 1678attributes #0 = { nounwind readnone convergent } 1679;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: 1680; GCN: {{.*}} 1681