1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12-SDAG %s 3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12-GISEL %s 4 5declare i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1), i64) 6 7define amdgpu_kernel void @global_atomic_ordered_add_b64_no_rtn(ptr addrspace(1) %addr, i64 %in) { 8; GFX12-SDAG-LABEL: global_atomic_ordered_add_b64_no_rtn: 9; GFX12-SDAG: ; %bb.0: ; %entry 10; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 11; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 12; GFX12-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3 13; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, s2 14; GFX12-SDAG-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:-32 th:TH_ATOMIC_RETURN 15; GFX12-SDAG-NEXT: s_endpgm 16; 17; GFX12-GISEL-LABEL: global_atomic_ordered_add_b64_no_rtn: 18; GFX12-GISEL: ; %bb.0: ; %entry 19; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 20; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0 21; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0 22; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 23; GFX12-GISEL-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:-32 th:TH_ATOMIC_RETURN 24; GFX12-GISEL-NEXT: s_endpgm 25entry: 26 %gep = getelementptr i64, ptr addrspace(1) %addr, i32 -4 27 %unused = call i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1) %gep, i64 %in) 28 ret void 29} 30 31define amdgpu_kernel void @global_atomic_ordered_add_b64_rtn(ptr addrspace(1) %addr, i64 %in, ptr addrspace(1) %use) { 32; GFX12-SDAG-LABEL: global_atomic_ordered_add_b64_rtn: 33; GFX12-SDAG: ; %bb.0: ; %entry 34; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 35; GFX12-SDAG-NEXT: v_mov_b32_e32 v2, 0 36; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 37; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0 38; GFX12-SDAG-NEXT: v_dual_mov_b32 v1, s3 :: v_dual_mov_b32 v0, s2 39; GFX12-SDAG-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:32 th:TH_ATOMIC_RETURN 40; GFX12-SDAG-NEXT: s_wait_loadcnt 0x0 41; GFX12-SDAG-NEXT: global_store_b64 v2, v[0:1], s[4:5] 42; GFX12-SDAG-NEXT: s_endpgm 43; 44; GFX12-GISEL-LABEL: global_atomic_ordered_add_b64_rtn: 45; GFX12-GISEL: ; %bb.0: ; %entry 46; GFX12-GISEL-NEXT: s_clause 0x1 47; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 48; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34 49; GFX12-GISEL-NEXT: v_mov_b32_e32 v2, 0 50; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0 51; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3 52; GFX12-GISEL-NEXT: global_atomic_ordered_add_b64 v[0:1], v2, v[0:1], s[0:1] offset:32 th:TH_ATOMIC_RETURN 53; GFX12-GISEL-NEXT: s_wait_loadcnt 0x0 54; GFX12-GISEL-NEXT: global_store_b64 v2, v[0:1], s[4:5] 55; GFX12-GISEL-NEXT: s_endpgm 56entry: 57 %gep = getelementptr i64, ptr addrspace(1) %addr, i32 4 58 %val = call i64 @llvm.amdgcn.global.atomic.ordered.add.b64(ptr addrspace(1) %gep, i64 %in) 59 store i64 %val, ptr addrspace(1) %use 60 ret void 61} 62