xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s  | FileCheck -check-prefix=GCN %s
3
4declare float @llvm.fabs.f32(float) #0
5declare float @llvm.copysign.f32(float, float) #0
6declare double @llvm.fabs.f64(double) #0
7declare i32 @llvm.amdgcn.frexp.exp.i32.f32(float) #0
8declare i32 @llvm.amdgcn.frexp.exp.i32.f64(double) #0
9
10; GCN-LABEL: {{^}}s_test_frexp_exp_f32:
11; GCN: v_frexp_exp_i32_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
12define amdgpu_kernel void @s_test_frexp_exp_f32(ptr addrspace(1) %out, float %src) #1 {
13  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f32(float %src)
14  store i32 %frexp.exp, ptr addrspace(1) %out
15  ret void
16}
17
18; GCN-LABEL: {{^}}s_test_fabs_frexp_exp_f32:
19; GCN: v_frexp_exp_i32_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
20define amdgpu_kernel void @s_test_fabs_frexp_exp_f32(ptr addrspace(1) %out, float %src) #1 {
21  %fabs.src = call float @llvm.fabs.f32(float %src)
22  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f32(float %fabs.src)
23  store i32 %frexp.exp, ptr addrspace(1) %out
24  ret void
25}
26
27; GCN-LABEL: {{^}}s_test_fneg_fabs_frexp_exp_f32:
28; GCN: v_frexp_exp_i32_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
29define amdgpu_kernel void @s_test_fneg_fabs_frexp_exp_f32(ptr addrspace(1) %out, float %src) #1 {
30  %fabs.src = call float @llvm.fabs.f32(float %src)
31  %fneg.fabs.src = fneg float %fabs.src
32  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f32(float %fneg.fabs.src)
33  store i32 %frexp.exp, ptr addrspace(1) %out
34  ret void
35}
36
37; GCN-LABEL: {{^}}s_test_copysign_frexp_exp_f32:
38; GCN: v_frexp_exp_i32_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
39define amdgpu_kernel void @s_test_copysign_frexp_exp_f32(ptr addrspace(1) %out, float %src, float %sign) #1 {
40  %copysign = call float @llvm.copysign.f32(float %src, float %sign)
41  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f32(float %copysign)
42  store i32 %frexp.exp, ptr addrspace(1) %out
43  ret void
44}
45
46; GCN-LABEL: {{^}}s_test_frexp_exp_f64:
47; GCN: v_frexp_exp_i32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
48define amdgpu_kernel void @s_test_frexp_exp_f64(ptr addrspace(1) %out, double %src) #1 {
49  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f64(double %src)
50  store i32 %frexp.exp, ptr addrspace(1) %out
51  ret void
52}
53
54; GCN-LABEL: {{^}}s_test_fabs_frexp_exp_f64:
55; GCN: v_frexp_exp_i32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
56define amdgpu_kernel void @s_test_fabs_frexp_exp_f64(ptr addrspace(1) %out, double %src) #1 {
57  %fabs.src = call double @llvm.fabs.f64(double %src)
58  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f64(double %fabs.src)
59  store i32 %frexp.exp, ptr addrspace(1) %out
60  ret void
61}
62
63; GCN-LABEL: {{^}}s_test_fneg_fabs_frexp_exp_f64:
64; GCN: v_frexp_exp_i32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
65define amdgpu_kernel void @s_test_fneg_fabs_frexp_exp_f64(ptr addrspace(1) %out, double %src) #1 {
66  %fabs.src = call double @llvm.fabs.f64(double %src)
67  %fneg.fabs.src = fneg double %fabs.src
68  %frexp.exp = call i32 @llvm.amdgcn.frexp.exp.i32.f64(double %fneg.fabs.src)
69  store i32 %frexp.exp, ptr addrspace(1) %out
70  ret void
71}
72
73attributes #0 = { nounwind readnone }
74attributes #1 = { nounwind }
75