xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll (revision ad386a886b16ad83a982c0eff3f80d8ae8888882) 
1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck %s
2; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s
3
4declare i32 @llvm.amdgcn.ds.swizzle(i32, i32) #0
5
6; CHECK-LABEL: {{^}}ds_swizzle:
7; CHECK: ds_swizzle_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:swizzle(BITMASK_PERM,"00p11")
8define amdgpu_kernel void @ds_swizzle(ptr addrspace(1) %out, i32 %src) nounwind {
9  %swizzle = call i32 @llvm.amdgcn.ds.swizzle(i32 %src, i32 100) #0
10  store i32 %swizzle, ptr addrspace(1) %out, align 4
11  ret void
12}
13
14attributes #0 = { nounwind readnone convergent }
15