xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll (revision 18ec885a26049264a56714f234c086eec2df68db) 
1;RUN: llc < %s -mtriple=amdgcn -mcpu=gfx600 -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,SI
2;RUN: llc < %s -mtriple=amdgcn -mcpu=gfx700 -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,GCNX3
3
4;CHECK-LABEL: {{^}}buffer_raw_load_immoffs_x3:
5;SI: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 offset:40
6;GCNX3: buffer_load_dwordx3 v[0:2], off, s[0:3], 0 offset:40
7;CHECK: s_waitcnt
8define amdgpu_ps <3 x float> @buffer_raw_load_immoffs_x3(<4 x i32> inreg) {
9main_body:
10  %data = call <3 x float> @llvm.amdgcn.raw.buffer.load.v3f32(<4 x i32> %0, i32 40, i32 0, i32 0)
11  ret <3 x float> %data
12}
13
14;CHECK-LABEL: {{^}}buffer_struct_load_format_immoffs_x3:
15;SI: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
16;GCNX3: buffer_load_format_xyz v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
17;CHECK: s_waitcnt
18define amdgpu_ps <3 x float> @buffer_struct_load_format_immoffs_x3(<4 x i32> inreg) {
19main_body:
20  %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32> %0, i32 0, i32 42, i32 0, i32 0)
21  ret <3 x float> %data
22}
23
24;CHECK-LABEL: {{^}}struct_buffer_load_immoffs_x3:
25;SI: buffer_load_dwordx4 v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:40
26;GCNX3: buffer_load_dwordx3 v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:40
27;CHECK: s_waitcnt
28define amdgpu_ps <3 x float> @struct_buffer_load_immoffs_x3(<4 x i32> inreg) {
29main_body:
30  %data = call <3 x float> @llvm.amdgcn.struct.buffer.load.v3f32(<4 x i32> %0, i32 0, i32 40, i32 0, i32 0)
31  ret <3 x float> %data
32}
33
34;CHECK-LABEL: {{^}}buffer_raw_ptr_load_immoffs_x3:
35;SI: buffer_load_dwordx4 v[0:3], off, s[0:3], 0 offset:40
36;GCNX3: buffer_load_dwordx3 v[0:2], off, s[0:3], 0 offset:40
37;CHECK: s_waitcnt
38define amdgpu_ps <3 x float> @buffer_raw_ptr_load_immoffs_x3(ptr addrspace(8) inreg) {
39main_body:
40  %data = call <3 x float> @llvm.amdgcn.raw.ptr.buffer.load.v3f32(ptr addrspace(8) %0, i32 40, i32 0, i32 0)
41  ret <3 x float> %data
42}
43
44;CHECK-LABEL: {{^}}buffer_struct_ptr_load_format_immoffs_x3:
45;SI: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
46;GCNX3: buffer_load_format_xyz v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:42
47;CHECK: s_waitcnt
48define amdgpu_ps <3 x float> @buffer_struct_ptr_load_format_immoffs_x3(ptr addrspace(8) inreg) {
49main_body:
50  %data = call <3 x float> @llvm.amdgcn.struct.ptr.buffer.load.format.v3f32(ptr addrspace(8) %0, i32 0, i32 42, i32 0, i32 0)
51  ret <3 x float> %data
52}
53
54;CHECK-LABEL: {{^}}struct_ptr_buffer_load_immoffs_x3:
55;SI: buffer_load_dwordx4 v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:40
56;GCNX3: buffer_load_dwordx3 v[0:2], {{v[0-9]+}}, s[0:3], 0 idxen offset:40
57;CHECK: s_waitcnt
58define amdgpu_ps <3 x float> @struct_ptr_buffer_load_immoffs_x3(ptr addrspace(8) inreg) {
59main_body:
60  %data = call <3 x float> @llvm.amdgcn.struct.ptr.buffer.load.v3f32(ptr addrspace(8) %0, i32 0, i32 40, i32 0, i32 0)
61  ret <3 x float> %data
62}
63
64declare <3 x float> @llvm.amdgcn.raw.buffer.load.format.v3f32(<4 x i32>, i32, i32, i32) #0
65declare <3 x float> @llvm.amdgcn.raw.buffer.load.v3f32(<4 x i32>, i32, i32, i32) #0
66declare <3 x float> @llvm.amdgcn.struct.buffer.load.format.v3f32(<4 x i32>, i32, i32, i32, i32) #0
67declare <3 x float> @llvm.amdgcn.struct.buffer.load.v3f32(<4 x i32>, i32, i32, i32, i32) #0
68declare <3 x float> @llvm.amdgcn.raw.ptr.buffer.load.format.v3f32(ptr addrspace(8), i32, i32, i32) #0
69declare <3 x float> @llvm.amdgcn.raw.ptr.buffer.load.v3f32(ptr addrspace(8), i32, i32, i32) #0
70declare <3 x float> @llvm.amdgcn.struct.ptr.buffer.load.format.v3f32(ptr addrspace(8), i32, i32, i32, i32) #0
71declare <3 x float> @llvm.amdgcn.struct.ptr.buffer.load.v3f32(ptr addrspace(8), i32, i32, i32, i32) #0
72
73