1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefix=GFX9 3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefix=GFX9 4 5; Marking the image loads as invariant should allow both loads to be hoisted 6; above both stores. 7define amdgpu_ps void @test(<8 x i32> inreg %load, <8 x i32> inreg %store) { 8; GFX9-LABEL: test: 9; GFX9: ; %bb.0: 10; GFX9-NEXT: v_mov_b32_e32 v0, 0 11; GFX9-NEXT: v_mov_b32_e32 v1, 1 12; GFX9-NEXT: image_load v2, v0, s[0:7] dmask:0x1 unorm 13; GFX9-NEXT: image_load v3, v1, s[0:7] dmask:0x1 unorm 14; GFX9-NEXT: s_waitcnt vmcnt(1) 15; GFX9-NEXT: image_store v2, v0, s[8:15] dmask:0x1 unorm 16; GFX9-NEXT: s_waitcnt vmcnt(1) 17; GFX9-NEXT: image_store v3, v1, s[8:15] dmask:0x1 unorm 18; GFX9-NEXT: s_endpgm 19 %data0 = call float @llvm.amdgcn.image.load.1d.f32.i32(i32 1, i32 0, <8 x i32> %load, i32 0, i32 0), !invariant.load !0 20 call void @llvm.amdgcn.image.store.1d.f32.i32(float %data0, i32 1, i32 0, <8 x i32> %store, i32 0, i32 0) 21 %data1 = call float @llvm.amdgcn.image.load.1d.f32.i32(i32 1, i32 1, <8 x i32> %load, i32 0, i32 0), !invariant.load !0 22 call void @llvm.amdgcn.image.store.1d.f32.i32(float %data1, i32 1, i32 1, <8 x i32> %store, i32 0, i32 0) 23 ret void 24} 25 26declare float @llvm.amdgcn.image.load.1d.f32.i32(i32 immarg, i32, <8 x i32>, i32 immarg, i32 immarg) 27declare void @llvm.amdgcn.image.store.1d.f32.i32(float, i32 immarg, i32, <8 x i32>, i32 immarg, i32 immarg) 28 29!0 = !{} 30