1; RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -enable-amdgpu-aa=0 -mattr=+flat-for-global -enable-misched=false < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89 %s 2; RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -enable-amdgpu-aa=0 -mattr=+flat-for-global -enable-misched=false < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s 3 4; GCN-LABEL: {{^}}v_insertelement_v2i16_dynamic_vgpr: 5 6; GCN: {{flat|global}}_load_dword [[IDX:v[0-9]+]] 7; GCN: {{flat|global}}_load_dword [[VEC:v[0-9]+]] 8 9; GFX89: s_mov_b32 [[MASKK:s[0-9]+]], 0xffff{{$}} 10 11; GFX89: v_lshlrev_b32_e32 [[SCALED_IDX:v[0-9]+]], 4, [[IDX]] 12; GFX89: v_lshlrev_b32_e64 [[MASK:v[0-9]+]], [[SCALED_IDX]], [[MASKK]] 13 14; GCN: s_mov_b32 [[K:s[0-9]+]], 0x3e703e7 15 16; CI: v_lshlrev_b32_e32 [[SCALED_IDX:v[0-9]+]], 4, [[IDX]] 17; CI: v_lshl_b32_e32 [[MASK:v[0-9]+]], 0xffff, [[SCALED_IDX]] 18 19; GCN: v_bfi_b32 [[RESULT:v[0-9]+]], [[MASK]], [[K]], [[VEC]] 20; GCN: {{flat|global}}_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RESULT]] 21define amdgpu_kernel void @v_insertelement_v2i16_dynamic_vgpr(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr addrspace(1) %idx.ptr) #0 { 22 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1 23 %tid.ext = sext i32 %tid to i64 24 %in.gep = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in, i64 %tid.ext 25 %idx.gep = getelementptr inbounds i32, ptr addrspace(1) %idx.ptr, i64 %tid.ext 26 %out.gep = getelementptr inbounds <2 x i16>, ptr addrspace(1) %out, i64 %tid.ext 27 %idx = load i32, ptr addrspace(1) %idx.gep 28 %vec = load <2 x i16>, ptr addrspace(1) %in.gep 29 %vecins = insertelement <2 x i16> %vec, i16 999, i32 %idx 30 store <2 x i16> %vecins, ptr addrspace(1) %out.gep 31 ret void 32} 33 34 35declare i32 @llvm.amdgcn.workitem.id.x() #1 36 37attributes #0 = { nounwind } 38attributes #1 = { nounwind readnone } 39