xref: /llvm-project/llvm/test/CodeGen/AMDGPU/insert_subreg.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -mattr=-promote-alloca -verify-machineinstrs < %s
2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s
3
4; Test that INSERT_SUBREG instructions don't have non-register operands after
5; instruction selection.
6
7; Make sure this doesn't crash
8; CHECK-LABEL: test:
9define amdgpu_kernel void @test(ptr addrspace(1) %out) {
10entry:
11  %tmp0 = alloca [16 x i32], addrspace(5)
12  %tmp1 = ptrtoint ptr addrspace(5) %tmp0 to i32
13  %tmp2 = sext i32 %tmp1 to i64
14  store i64 %tmp2, ptr addrspace(1) %out
15  ret void
16}
17