xref: /llvm-project/llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir (revision 66bd3cd75b32ccfa8d228c200cf4fbf72d49fd1f)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
2# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass si-insert-waitcnts %s -o - | FileCheck %s
3
4---
5name: test
6tracksRegLiveness: true
7stack:
8  - { id: 0, name: '', type: spill-slot, offset: 4, size: 40, alignment: 4,
9      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
10      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
11machineFunctionInfo:
12  frameOffsetReg: '$sgpr33'
13body: |
14  ; CHECK-LABEL: name: test
15  ; CHECK: bb.0:
16  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
17  ; CHECK-NEXT:   liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $vgpr0, $vgpr1, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
18  ; CHECK-NEXT: {{  $}}
19  ; CHECK-NEXT:   S_WAITCNT 0
20  ; CHECK-NEXT:   SCRATCH_STORE_DWORDX4_SADDR killed undef $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 :: (store (s128) into %stack.0, align 4, addrspace 5)
21  ; CHECK-NEXT: {{  $}}
22  ; CHECK-NEXT: bb.1:
23  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
24  ; CHECK-NEXT:   liveins: $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $vgpr31, $vgpr40, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $vgpr0_vgpr1:0x000000000000000F
25  ; CHECK-NEXT: {{  $}}
26  ; CHECK-NEXT:   dead $sgpr30_sgpr31 = SI_CALL killed undef renamable $sgpr0_sgpr1, 0, csr_amdgpu
27  ; CHECK-NEXT:   S_CBRANCH_EXECNZ %bb.1, implicit $exec
28  ; CHECK-NEXT: {{  $}}
29  ; CHECK-NEXT: bb.2:
30  ; CHECK-NEXT:   liveins: $sgpr46, $vgpr40
31  ; CHECK-NEXT: {{  $}}
32  ; CHECK-NEXT:   S_SETPC_B64_return undef $sgpr30_sgpr31
33  bb.0:
34    successors: %bb.1(0x80000000)
35    liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $vgpr0, $vgpr1, $vgpr31, $vgpr40, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
36
37    SCRATCH_STORE_DWORDX4_SADDR killed undef $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17 :: (store (s128) into %stack.0, align 4, addrspace 5)
38
39  bb.1:
40    successors: %bb.1(0x40000000), %bb.2(0x40000000)
41    liveins: $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $vgpr31, $vgpr40, $sgpr34_sgpr35, $sgpr36_sgpr37, $sgpr38_sgpr39, $sgpr40_sgpr41, $vgpr0_vgpr1:0x000000000000000F
42
43    dead $sgpr30_sgpr31 = SI_CALL killed undef renamable $sgpr0_sgpr1, 0, csr_amdgpu
44    S_CBRANCH_EXECNZ %bb.1, implicit $exec
45
46  bb.2:
47    liveins: $sgpr46, $vgpr40
48
49    S_SETPC_B64_return undef $sgpr30_sgpr31
50...
51