1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass si-pre-emit-peephole %s -o - | FileCheck %s 3 4--- 5 6name: no_count_dbg_value 7body: | 8 ; CHECK-LABEL: name: no_count_dbg_value 9 ; CHECK: bb.0: 10 ; CHECK-NEXT: successors: %bb.1(0x40000000) 11 ; CHECK-NEXT: {{ $}} 12 ; CHECK-NEXT: $vgpr1 = V_MOV_B32_e32 7, implicit $exec 13 ; CHECK-NEXT: {{ $}} 14 ; CHECK-NEXT: bb.1: 15 ; CHECK-NEXT: successors: %bb.2(0x80000000) 16 ; CHECK-NEXT: {{ $}} 17 ; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 0, implicit $exec 18 ; CHECK-NEXT: DBG_VALUE 19 ; CHECK-NEXT: DBG_VALUE 20 ; CHECK-NEXT: DBG_VALUE 21 ; CHECK-NEXT: DBG_VALUE 22 ; CHECK-NEXT: DBG_VALUE 23 ; CHECK-NEXT: DBG_VALUE 24 ; CHECK-NEXT: {{ $}} 25 ; CHECK-NEXT: bb.2: 26 ; CHECK-NEXT: successors: %bb.3(0x80000000) 27 ; CHECK-NEXT: {{ $}} 28 ; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 1, implicit $exec 29 ; CHECK-NEXT: {{ $}} 30 ; CHECK-NEXT: bb.3: 31 ; CHECK-NEXT: S_ENDPGM 0 32 bb.0: 33 successors: %bb.1, %bb.2 34 35 $vgpr1 = V_MOV_B32_e32 7, implicit $exec 36 S_CBRANCH_EXECZ %bb.2, implicit $exec 37 38 bb.1: 39 successors: %bb.2 40 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 41 DBG_VALUE 42 DBG_VALUE 43 DBG_VALUE 44 DBG_VALUE 45 DBG_VALUE 46 DBG_VALUE 47 48 bb.2: 49 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 50 51 bb.3: 52 S_ENDPGM 0 53... 54 55