xref: /llvm-project/llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-i1-copies %s -o - | FileCheck -check-prefix=GCN %s
3---
4
5name: kernel_i1_copy_phi_with_phi_incoming_value
6tracksRegLiveness: true
7body:             |
8  ; GCN-LABEL: name: kernel_i1_copy_phi_with_phi_incoming_value
9  ; GCN: bb.0:
10  ; GCN-NEXT:   successors: %bb.1(0x40000000), %bb.5(0x40000000)
11  ; GCN-NEXT:   liveins: $vgpr0, $sgpr4_sgpr5
12  ; GCN-NEXT: {{  $}}
13  ; GCN-NEXT:   [[COPY:%[0-9]+]]:sgpr_64(p4) = COPY $sgpr4_sgpr5
14  ; GCN-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
15  ; GCN-NEXT:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]](p4), 0, 0 :: (dereferenceable invariant load (s32), align 16, addrspace 4)
16  ; GCN-NEXT:   [[COPY2:%[0-9]+]]:sreg_32 = COPY [[S_LOAD_DWORD_IMM]]
17  ; GCN-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]](s32)
18  ; GCN-NEXT:   [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY1]](s32), [[S_LOAD_DWORD_IMM]], implicit $exec
19  ; GCN-NEXT:   [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
20  ; GCN-NEXT:   [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[V_CMP_LT_I32_e64_]], %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
21  ; GCN-NEXT:   S_BRANCH %bb.1
22  ; GCN-NEXT: {{  $}}
23  ; GCN-NEXT: bb.1:
24  ; GCN-NEXT:   successors: %bb.6(0x80000000)
25  ; GCN-NEXT: {{  $}}
26  ; GCN-NEXT:   [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16
27  ; GCN-NEXT:   [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY3]], killed [[S_MOV_B32_]], 0, implicit $exec
28  ; GCN-NEXT:   [[V_CMP_GE_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GE_I32_e64 [[V_ADD_U32_e64_]], [[COPY2]], implicit $exec
29  ; GCN-NEXT:   [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0
30  ; GCN-NEXT:   [[COPY4:%[0-9]+]]:sreg_64 = COPY [[V_CMP_GE_I32_e64_]]
31  ; GCN-NEXT:   S_BRANCH %bb.6
32  ; GCN-NEXT: {{  $}}
33  ; GCN-NEXT: bb.2:
34  ; GCN-NEXT:   successors: %bb.5(0x80000000)
35  ; GCN-NEXT: {{  $}}
36  ; GCN-NEXT:   [[PHI:%[0-9]+]]:sreg_64 = PHI %15, %bb.6
37  ; GCN-NEXT:   SI_END_CF [[PHI]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
38  ; GCN-NEXT:   [[S_MOV_B64_2:%[0-9]+]]:sreg_64 = S_MOV_B64 -1
39  ; GCN-NEXT:   [[COPY5:%[0-9]+]]:sreg_64 = COPY $exec
40  ; GCN-NEXT:   S_BRANCH %bb.5
41  ; GCN-NEXT: {{  $}}
42  ; GCN-NEXT: bb.3:
43  ; GCN-NEXT:   successors: %bb.4(0x40000000), %bb.7(0x40000000)
44  ; GCN-NEXT: {{  $}}
45  ; GCN-NEXT:   ATOMIC_FENCE 5, 2
46  ; GCN-NEXT:   S_BARRIER
47  ; GCN-NEXT:   ATOMIC_FENCE 4, 2
48  ; GCN-NEXT:   [[COPY6:%[0-9]+]]:sreg_64 = COPY %18
49  ; GCN-NEXT:   [[SI_IF1:%[0-9]+]]:sreg_64 = SI_IF [[COPY6]], %bb.7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
50  ; GCN-NEXT:   S_BRANCH %bb.4
51  ; GCN-NEXT: {{  $}}
52  ; GCN-NEXT: bb.4:
53  ; GCN-NEXT:   successors: %bb.7(0x80000000)
54  ; GCN-NEXT: {{  $}}
55  ; GCN-NEXT:   S_BRANCH %bb.7
56  ; GCN-NEXT: {{  $}}
57  ; GCN-NEXT: bb.5:
58  ; GCN-NEXT:   successors: %bb.3(0x80000000)
59  ; GCN-NEXT: {{  $}}
60  ; GCN-NEXT:   [[PHI1:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_]], %bb.0, [[COPY5]], %bb.2
61  ; GCN-NEXT:   SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
62  ; GCN-NEXT:   S_BRANCH %bb.3
63  ; GCN-NEXT: {{  $}}
64  ; GCN-NEXT: bb.6:
65  ; GCN-NEXT:   successors: %bb.2(0x40000000), %bb.6(0x40000000)
66  ; GCN-NEXT: {{  $}}
67  ; GCN-NEXT:   [[PHI2:%[0-9]+]]:sreg_64 = PHI [[S_MOV_B64_1]], %bb.1, %15, %bb.6
68  ; GCN-NEXT:   [[COPY7:%[0-9]+]]:sreg_64 = COPY [[COPY4]]
69  ; GCN-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK [[COPY7]], [[PHI2]], implicit-def dead $scc
70  ; GCN-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
71  ; GCN-NEXT:   S_BRANCH %bb.2
72  ; GCN-NEXT: {{  $}}
73  ; GCN-NEXT: bb.7:
74  ; GCN-NEXT:   SI_END_CF [[SI_IF1]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
75  ; GCN-NEXT:   S_ENDPGM 0
76  bb.0:
77    successors: %bb.1, %bb.5
78    liveins: $vgpr0, $sgpr4_sgpr5
79
80    %1:sgpr_64(p4) = COPY $sgpr4_sgpr5
81    %2:vgpr_32(s32) = COPY $vgpr0
82    %3:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1:sgpr_64(p4), 0, 0 :: (dereferenceable invariant load (s32), align 16, addrspace 4)
83    %8:sreg_32 = COPY %3:sreg_32_xm0_xexec
84    %14:vgpr_32 = COPY %2:vgpr_32(s32)
85    %9:sreg_64 = V_CMP_LT_I32_e64 %2:vgpr_32(s32), %3:sreg_32_xm0_xexec, implicit $exec
86    %4:sreg_64 = S_MOV_B64 0
87    %17:vreg_1 = COPY %4:sreg_64, implicit $exec
88    %16:sreg_64 = SI_IF killed %9:sreg_64, %bb.5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
89    S_BRANCH %bb.1
90
91  bb.1:
92  ; predecessors: %bb.0
93    successors: %bb.6
94
95    %10:sreg_32 = S_MOV_B32 16
96    %18:vgpr_32 = V_ADD_U32_e64 %14:vgpr_32, killed %10:sreg_32, 0, implicit $exec
97    %11:sreg_64 = V_CMP_GE_I32_e64 %18:vgpr_32, %8:sreg_32, implicit $exec
98    %12:sreg_64 = S_MOV_B64 0
99    %19:vreg_1 = COPY %11:sreg_64
100    S_BRANCH %bb.6
101
102  bb.2:
103  ; predecessors: %bb.6
104    successors: %bb.5
105
106    %20:sreg_64 = PHI %6:sreg_64, %bb.6
107    SI_END_CF %20:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
108    %15:sreg_64 = S_MOV_B64 -1
109    %21:vreg_1 = COPY %15:sreg_64, implicit $exec
110    S_BRANCH %bb.5
111
112  bb.3:
113  ; predecessors: %bb.5
114    successors: %bb.4, %bb.7
115
116    %22:vreg_1 = PHI %7:vreg_1, %bb.5
117    ATOMIC_FENCE 5, 2
118    S_BARRIER
119    ATOMIC_FENCE 4, 2
120    %23:sreg_64 = COPY %22:vreg_1
121    %24:sreg_64 = SI_IF %23:sreg_64, %bb.7, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
122    S_BRANCH %bb.4
123
124  bb.4:
125  ; predecessors: %bb.3
126    successors: %bb.7
127
128    S_BRANCH %bb.7
129
130  bb.5:
131  ; predecessors: %bb.0, %bb.2
132    successors: %bb.3
133
134    %7:vreg_1 = PHI %17:vreg_1, %bb.0, %21:vreg_1, %bb.2
135    SI_END_CF %16:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
136    S_BRANCH %bb.3
137
138  bb.6:
139  ; predecessors: %bb.1, %bb.6
140    successors: %bb.2, %bb.6
141
142    %5:sreg_64 = PHI %12:sreg_64, %bb.1, %6:sreg_64, %bb.6
143    %13:sreg_64 = COPY %19:vreg_1
144    %6:sreg_64 = SI_IF_BREAK %13:sreg_64, %5:sreg_64, implicit-def dead $scc
145    SI_LOOP %6:sreg_64, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
146    S_BRANCH %bb.2
147
148  bb.7:
149  ; predecessors: %bb.3, %bb.4
150
151    SI_END_CF %24:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
152    S_ENDPGM 0
153
154...
155