xref: /llvm-project/llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3
4; SILowerI1Copies was not handling IMPLICIT_DEF
5; SI-LABEL: {{^}}br_implicit_def:
6; SI: %bb.0:
7; SI-NEXT: s_cbranch_scc1
8define amdgpu_kernel void @br_implicit_def(ptr addrspace(1) %out, i32 %arg) #0 {
9bb:
10  br i1 undef, label %bb1, label %bb2
11
12bb1:
13  store volatile i32 123, ptr addrspace(1) %out
14  ret void
15
16bb2:
17  ret void
18}
19
20attributes #0 = { nounwind }
21