1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=si-i1-copies -o - %s | FileCheck %s 3 4# The strange block ordering visits the use before the def. 5--- 6name: inserted_cmp_operand_class_rpo 7tracksRegLiveness: true 8machineFunctionInfo: 9 isEntryFunction: true 10body: | 11 ; CHECK-LABEL: name: inserted_cmp_operand_class_rpo 12 ; CHECK: bb.0: 13 ; CHECK-NEXT: successors: %bb.3(0x80000000) 14 ; CHECK-NEXT: {{ $}} 15 ; CHECK-NEXT: S_BRANCH %bb.3 16 ; CHECK-NEXT: {{ $}} 17 ; CHECK-NEXT: bb.1: 18 ; CHECK-NEXT: successors: %bb.2(0x80000000) 19 ; CHECK-NEXT: {{ $}} 20 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY %1 21 ; CHECK-NEXT: {{ $}} 22 ; CHECK-NEXT: bb.2: 23 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 24 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY [[COPY]] 25 ; CHECK-NEXT: S_ENDPGM 0 26 ; CHECK-NEXT: {{ $}} 27 ; CHECK-NEXT: bb.3: 28 ; CHECK-NEXT: successors: %bb.1(0x80000000) 29 ; CHECK-NEXT: {{ $}} 30 ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 31 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0 32 ; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_EQ_U32_e64 killed [[V_MOV_B32_e32_1]], killed [[S_MOV_B32_]], implicit $exec 33 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY [[V_CMP_EQ_U32_e64_]] 34 ; CHECK-NEXT: S_BRANCH %bb.1 35 bb.0: 36 successors: %bb.3 37 38 S_BRANCH %bb.3 39 40 bb.1: 41 successors: %bb.2 42 43 %0:vreg_1 = COPY %1 44 45 bb.2: 46 %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 47 %3:sreg_64_xexec = COPY %0 48 S_ENDPGM 0 49 50 bb.3: 51 successors: %bb.1 52 53 %4:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 54 %5:sreg_32_xm0 = S_MOV_B32 0 55 %6:sreg_64 = V_CMP_EQ_U32_e64 killed %4, killed %5, implicit $exec 56 %1:vreg_1 = COPY %6 57 S_BRANCH %bb.1 58... 59