xref: /llvm-project/llvm/test/CodeGen/AMDGPU/fract.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN:  llc -amdgpu-scalarize-global-loads=false  -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
2; RUN:  llc -amdgpu-scalarize-global-loads=false  -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
3; RUN:  llc -amdgpu-scalarize-global-loads=false  -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
4; RUN:  llc -amdgpu-scalarize-global-loads=false  -mtriple=amdgcn -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck --check-prefix=GCN %s
5; RUN:  llc -amdgpu-scalarize-global-loads=false  -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck --check-prefix=GCN %s
6
7declare float @llvm.fabs.f32(float) #0
8declare float @llvm.floor.f32(float) #0
9
10; GCN-LABEL: {{^}}fract_f32:
11; GCN: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
12; GCN: v_sub_f32_e32 [[RESULT:v[0-9]+]], [[INPUT]], [[FLR]]
13
14; GCN: buffer_store_dword [[RESULT]]
15define amdgpu_kernel void @fract_f32(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
16  %x = load float, ptr addrspace(1) %src
17  %floor.x = call float @llvm.floor.f32(float %x)
18  %fract = fsub float %x, %floor.x
19  store float %fract, ptr addrspace(1) %out
20  ret void
21}
22
23; GCN-LABEL: {{^}}fract_f32_neg:
24; GCN: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
25; GCN: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
26; GCN: buffer_store_dword [[RESULT]]
27define amdgpu_kernel void @fract_f32_neg(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
28  %x = load float, ptr addrspace(1) %src
29  %x.neg = fsub float -0.0, %x
30  %floor.x.neg = call float @llvm.floor.f32(float %x.neg)
31  %fract = fsub float %x.neg, %floor.x.neg
32  store float %fract, ptr addrspace(1) %out
33  ret void
34}
35
36; GCN-LABEL: {{^}}fract_f32_neg_abs:
37; GCN: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
38; GCN: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
39; GCN: buffer_store_dword [[RESULT]]
40define amdgpu_kernel void @fract_f32_neg_abs(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
41  %x = load float, ptr addrspace(1) %src
42  %abs.x = call float @llvm.fabs.f32(float %x)
43  %neg.abs.x = fsub float -0.0, %abs.x
44  %floor.neg.abs.x = call float @llvm.floor.f32(float %neg.abs.x)
45  %fract = fsub float %neg.abs.x, %floor.neg.abs.x
46  store float %fract, ptr addrspace(1) %out
47  ret void
48}
49
50; GCN-LABEL: {{^}}multi_use_floor_fract_f32:
51; GCN-DAG: v_floor_f32_e32 [[FLOOR:v[0-9]+]], [[INPUT:v[0-9]+]]
52; GCN-DAG: v_sub_f32_e32 [[FRACT:v[0-9]+]], [[INPUT:v[0-9]+]]
53
54; GCN: buffer_store_dword [[FLOOR]]
55; GCN: buffer_store_dword [[FRACT]]
56define amdgpu_kernel void @multi_use_floor_fract_f32(ptr addrspace(1) %out, ptr addrspace(1) %src) #1 {
57  %x = load float, ptr addrspace(1) %src
58  %floor.x = call float @llvm.floor.f32(float %x)
59  %fract = fsub float %x, %floor.x
60  store volatile float %floor.x, ptr addrspace(1) %out
61  store volatile float %fract, ptr addrspace(1) %out
62  ret void
63}
64
65attributes #0 = { nounwind readnone }
66attributes #1 = { nounwind }
67