1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3 2# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass=si-fold-operands -o - %s | FileCheck --check-prefix=GCN %s 3 4--- 5name: no_fold_fp_64bit_literal_sgpr 6tracksRegLiveness: true 7body: | 8 bb.0: 9 10 ; GCN-LABEL: name: no_fold_fp_64bit_literal_sgpr 11 ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF 12 ; GCN-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 13 ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, [[S_MOV_B]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec 14 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] 15 %0:vreg_64 = IMPLICIT_DEF 16 %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 17 %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec 18 SI_RETURN_TO_EPILOG %2 19... 20 21--- 22name: no_fold_fp_64bit_literal_vgpr 23tracksRegLiveness: true 24body: | 25 bb.0: 26 27 ; GCN-LABEL: name: no_fold_fp_64bit_literal_vgpr 28 ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF 29 ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec 30 ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, [[V_MOV_B]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec 31 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] 32 %0:vreg_64 = IMPLICIT_DEF 33 %1:vreg_64 = V_MOV_B64_PSEUDO 1311768467750121200, implicit $exec 34 %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec 35 SI_RETURN_TO_EPILOG %2 36... 37 38--- 39name: fold_fp_32bit_literal_sgpr 40tracksRegLiveness: true 41body: | 42 bb.0: 43 44 ; GCN-LABEL: name: fold_fp_32bit_literal_sgpr 45 ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF 46 ; GCN-NEXT: [[V_ADD_F64_e64_:%[0-9]+]]:vreg_64 = V_ADD_F64_e64 0, 4636737291354636288, 0, [[DEF]], 0, 0, implicit $mode, implicit $exec 47 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_ADD_F64_e64_]] 48 %0:vreg_64 = IMPLICIT_DEF 49 %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 4636737291354636288 50 %2:vreg_64 = V_ADD_F64_e64 0, %1, 0, %0, 0, 0, implicit $mode, implicit $exec 51 SI_RETURN_TO_EPILOG %2 52... 53 54--- 55name: no_fold_int_64bit_literal_sgpr 56tracksRegLiveness: true 57body: | 58 bb.0: 59 60 ; GCN-LABEL: name: no_fold_int_64bit_literal_sgpr 61 ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF 62 ; GCN-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 63 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], [[S_MOV_B]], implicit-def $scc 64 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] 65 %0:sreg_64 = IMPLICIT_DEF 66 %1:sreg_64 = S_MOV_B64_IMM_PSEUDO 1311768467750121200 67 %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc 68 SI_RETURN_TO_EPILOG %2 69... 70 71--- 72name: fold_int_32bit_literal_sgpr 73tracksRegLiveness: true 74body: | 75 bb.0: 76 77 ; GCN-LABEL: name: fold_int_32bit_literal_sgpr 78 ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF 79 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], 2147483647, implicit-def $scc 80 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] 81 %0:sreg_64 = IMPLICIT_DEF 82 %1:sreg_64 = S_MOV_B64 2147483647 83 %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc 84 SI_RETURN_TO_EPILOG %2 85... 86 87# FIXME: This could be folded, but we do not know if operand of S_AND_B64 is signed or unsigned 88# and if it will be sign or zero extended. 89 90--- 91name: fold_uint_32bit_literal_sgpr 92tracksRegLiveness: true 93body: | 94 bb.0: 95 96 ; GCN-LABEL: name: fold_uint_32bit_literal_sgpr 97 ; GCN: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF 98 ; GCN-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 4294967295 99 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[DEF]], [[S_MOV_B64_]], implicit-def $scc 100 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[S_AND_B64_]] 101 %0:sreg_64 = IMPLICIT_DEF 102 %1:sreg_64 = S_MOV_B64 4294967295 103 %2:sreg_64 = S_AND_B64 %0, %1, implicit-def $scc 104 SI_RETURN_TO_EPILOG %2 105... 106 107--- 108name: no_fold_v2fp_64bit_literal_sgpr 109tracksRegLiveness: true 110body: | 111 bb.0: 112 113 ; GCN-LABEL: name: no_fold_v2fp_64bit_literal_sgpr 114 ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF 115 ; GCN-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64 = V_MOV_B64_PSEUDO 4629700418019000320, implicit $exec 116 ; GCN-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64 = V_PK_ADD_F32 0, [[DEF]], 0, [[V_MOV_B]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec 117 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_PK_ADD_F32_]] 118 %0:vreg_64 = IMPLICIT_DEF 119 %1:vreg_64 = V_MOV_B64_PSEUDO 4629700418019000320, implicit $exec 120 %2:vreg_64 = V_PK_ADD_F32 0, %0, 0, %1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec 121 SI_RETURN_TO_EPILOG %2 122... 123 124--- 125name: fold_v2fp_32bit_literal_sgpr 126tracksRegLiveness: true 127body: | 128 bb.0: 129 130 ; GCN-LABEL: name: fold_v2fp_32bit_literal_sgpr 131 ; GCN: [[DEF:%[0-9]+]]:vreg_64 = IMPLICIT_DEF 132 ; GCN-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64 = V_PK_ADD_F32 0, [[DEF]], 0, 1065353216, 0, 0, 0, 0, 0, implicit $mode, implicit $exec 133 ; GCN-NEXT: SI_RETURN_TO_EPILOG [[V_PK_ADD_F32_]] 134 %0:vreg_64 = IMPLICIT_DEF 135 %1:vreg_64 = V_MOV_B64_PSEUDO 1065353216, implicit $exec 136 %2:vreg_64 = V_PK_ADD_F32 0, %0, 0, %1, 0, 0, 0, 0, 0, implicit $mode, implicit $exec 137 SI_RETURN_TO_EPILOG %2 138... 139