1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass=si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s 3 4--- | 5 define amdgpu_kernel void @redef_m0_same_copy() { ret void } 6 define amdgpu_kernel void @multi_redef_m0_same_copy() { ret void } 7 define amdgpu_kernel void @redef_m0_different_copy() { ret void } 8 define amdgpu_kernel void @redef_m0_mixed_copy0() { ret void } 9 define amdgpu_kernel void @redef_m0_mixed_copy1() { ret void } 10 define amdgpu_kernel void @redef_m0_same_mov_imm() { ret void } 11 define amdgpu_kernel void @redef_m0_different_inst0() { ret void } 12 define amdgpu_kernel void @redef_m0_different_inst1() { ret void } 13 define amdgpu_kernel void @redef_m0_mixed_read_m0() { ret void } 14 define amdgpu_kernel void @redef_m0_same_copy_call() { ret void } 15 define amdgpu_kernel void @redef_m0_same_copy_multi_block() { ret void } 16 define amdgpu_kernel void @redef_m0_copy_self() { ret void } 17 define amdgpu_kernel void @redef_m0_copy_physreg() { ret void } 18 19 declare void @func() 20... 21 22--- 23name: redef_m0_same_copy 24tracksRegLiveness: true 25machineFunctionInfo: 26 isEntryFunction: true 27body: | 28 bb.0: 29 liveins: $vgpr0, $sgpr0 30 31 ; GCN-LABEL: name: redef_m0_same_copy 32 ; GCN: liveins: $vgpr0, $sgpr0 33 ; GCN-NEXT: {{ $}} 34 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 35 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 36 ; GCN-NEXT: $m0 = COPY [[COPY1]] 37 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 38 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 39 %0:vgpr_32 = COPY $vgpr0 40 %1:sgpr_32 = COPY $sgpr0 41 $m0 = COPY %1 42 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 43 $m0 = COPY %1 44 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 45 46... 47 48--- 49name: multi_redef_m0_same_copy 50tracksRegLiveness: true 51machineFunctionInfo: 52 isEntryFunction: true 53body: | 54 bb.0: 55 liveins: $vgpr0, $sgpr0 56 57 ; GCN-LABEL: name: multi_redef_m0_same_copy 58 ; GCN: liveins: $vgpr0, $sgpr0 59 ; GCN-NEXT: {{ $}} 60 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 61 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 62 ; GCN-NEXT: $m0 = COPY [[COPY1]] 63 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 64 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 65 %0:vgpr_32 = COPY $vgpr0 66 %1:sgpr_32 = COPY $sgpr0 67 $m0 = COPY %1 68 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 69 $m0 = COPY %1 70 $m0 = COPY %1 71 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 72 73... 74 75--- 76name: redef_m0_different_copy 77tracksRegLiveness: true 78machineFunctionInfo: 79 isEntryFunction: true 80body: | 81 bb.0: 82 liveins: $vgpr0, $sgpr0, $sgpr1 83 84 ; GCN-LABEL: name: redef_m0_different_copy 85 ; GCN: liveins: $vgpr0, $sgpr0, $sgpr1 86 ; GCN-NEXT: {{ $}} 87 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 88 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 89 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1 90 ; GCN-NEXT: $m0 = COPY [[COPY1]] 91 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 92 ; GCN-NEXT: $m0 = COPY [[COPY2]] 93 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 94 %0:vgpr_32 = COPY $vgpr0 95 %1:sgpr_32 = COPY $sgpr0 96 %2:sgpr_32 = COPY $sgpr1 97 $m0 = COPY %1 98 %3:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 99 $m0 = COPY %2 100 %4:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 101 102... 103 104--- 105name: redef_m0_mixed_copy0 106tracksRegLiveness: true 107machineFunctionInfo: 108 isEntryFunction: true 109body: | 110 bb.0: 111 liveins: $vgpr0, $sgpr0, $sgpr1 112 113 ; GCN-LABEL: name: redef_m0_mixed_copy0 114 ; GCN: liveins: $vgpr0, $sgpr0, $sgpr1 115 ; GCN-NEXT: {{ $}} 116 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 117 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 118 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1 119 ; GCN-NEXT: $m0 = COPY [[COPY1]] 120 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 121 ; GCN-NEXT: $m0 = COPY [[COPY2]] 122 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 123 %0:vgpr_32 = COPY $vgpr0 124 %1:sgpr_32 = COPY $sgpr0 125 %2:sgpr_32 = COPY $sgpr1 126 $m0 = COPY %1 127 %3:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 128 $m0 = COPY %1 129 $m0 = COPY %2 130 %4:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 131 132... 133 134--- 135name: redef_m0_mixed_copy1 136tracksRegLiveness: true 137 138machineFunctionInfo: 139 isEntryFunction: true 140body: | 141 bb.0: 142 liveins: $vgpr0, $sgpr0, $sgpr1 143 144 ; GCN-LABEL: name: redef_m0_mixed_copy1 145 ; GCN: liveins: $vgpr0, $sgpr0, $sgpr1 146 ; GCN-NEXT: {{ $}} 147 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 148 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 149 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1 150 ; GCN-NEXT: $m0 = COPY [[COPY1]] 151 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 152 ; GCN-NEXT: $m0 = COPY [[COPY2]] 153 ; GCN-NEXT: $m0 = COPY [[COPY1]] 154 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 155 %0:vgpr_32 = COPY $vgpr0 156 %1:sgpr_32 = COPY $sgpr0 157 %2:sgpr_32 = COPY $sgpr1 158 $m0 = COPY %1 159 %3:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 160 $m0 = COPY %2 161 $m0 = COPY %1 162 %4:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 163 164... 165 166--- 167name: redef_m0_same_mov_imm 168tracksRegLiveness: true 169machineFunctionInfo: 170 isEntryFunction: true 171body: | 172 bb.0: 173 liveins: $vgpr0, $sgpr0 174 175 ; GCN-LABEL: name: redef_m0_same_mov_imm 176 ; GCN: liveins: $vgpr0, $sgpr0 177 ; GCN-NEXT: {{ $}} 178 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 179 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 180 ; GCN-NEXT: $m0 = S_MOV_B32 -1 181 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 182 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 183 %0:vgpr_32 = COPY $vgpr0 184 %1:sgpr_32 = COPY $sgpr0 185 $m0 = S_MOV_B32 -1 186 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 187 $m0 = S_MOV_B32 -1 188 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 189 190... 191 192--- 193name: redef_m0_different_inst0 194tracksRegLiveness: true 195machineFunctionInfo: 196 isEntryFunction: true 197body: | 198 bb.0: 199 liveins: $vgpr0, $sgpr0 200 201 ; GCN-LABEL: name: redef_m0_different_inst0 202 ; GCN: liveins: $vgpr0, $sgpr0 203 ; GCN-NEXT: {{ $}} 204 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 205 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 206 ; GCN-NEXT: $m0 = COPY [[COPY1]] 207 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 208 ; GCN-NEXT: $m0 = IMPLICIT_DEF 209 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 210 %0:vgpr_32 = COPY $vgpr0 211 %1:sgpr_32 = COPY $sgpr0 212 $m0 = COPY %1 213 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 214 $m0 = IMPLICIT_DEF 215 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 216 217... 218 219--- 220name: redef_m0_different_inst1 221tracksRegLiveness: true 222machineFunctionInfo: 223 isEntryFunction: true 224body: | 225 bb.0: 226 liveins: $vgpr0, $sgpr0 227 228 ; GCN-LABEL: name: redef_m0_different_inst1 229 ; GCN: liveins: $vgpr0, $sgpr0 230 ; GCN-NEXT: {{ $}} 231 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 232 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 233 ; GCN-NEXT: $m0 = COPY [[COPY1]] 234 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 235 ; GCN-NEXT: S_NOP 0, implicit-def $m0 236 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 237 %0:vgpr_32 = COPY $vgpr0 238 %1:sgpr_32 = COPY $sgpr0 239 $m0 = COPY %1 240 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 241 S_NOP 0, implicit-def $m0 242 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 243 244... 245 246--- 247name: redef_m0_mixed_read_m0 248tracksRegLiveness: true 249machineFunctionInfo: 250 isEntryFunction: true 251body: | 252 bb.0: 253 liveins: $vgpr0, $sgpr0, $sgpr1 254 255 ; GCN-LABEL: name: redef_m0_mixed_read_m0 256 ; GCN: liveins: $vgpr0, $sgpr0, $sgpr1 257 ; GCN-NEXT: {{ $}} 258 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 259 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 260 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sgpr_32 = COPY $sgpr1 261 ; GCN-NEXT: $m0 = COPY [[COPY1]] 262 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 263 ; GCN-NEXT: $m0 = COPY [[COPY2]] 264 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 265 ; GCN-NEXT: [[DS_READ_B32_2:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 128, 0, implicit $m0, implicit $exec :: (load (s32)) 266 %0:vgpr_32 = COPY $vgpr0 267 %1:sgpr_32 = COPY $sgpr0 268 %2:sgpr_32 = COPY $sgpr1 269 $m0 = COPY %1 270 %3:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 271 $m0 = COPY %2 272 %4:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 273 $m0 = COPY %2 274 %5:vgpr_32 = DS_READ_B32 %0, 128, 0, implicit $m0, implicit $exec :: (load (s32)) 275... 276 277--- 278name: redef_m0_same_copy_call 279tracksRegLiveness: true 280machineFunctionInfo: 281 isEntryFunction: true 282body: | 283 bb.0: 284 liveins: $vgpr0, $sgpr0 285 286 ; GCN-LABEL: name: redef_m0_same_copy_call 287 ; GCN: liveins: $vgpr0, $sgpr0 288 ; GCN-NEXT: {{ $}} 289 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 290 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 291 ; GCN-NEXT: $m0 = COPY [[COPY1]] 292 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 293 ; GCN-NEXT: dead $sgpr30_sgpr31 = SI_CALL undef $sgpr6_sgpr7, @func, csr_amdgpu 294 ; GCN-NEXT: $m0 = COPY [[COPY1]] 295 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 296 %0:vgpr_32 = COPY $vgpr0 297 %1:sgpr_32 = COPY $sgpr0 298 $m0 = COPY %1 299 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 300 dead $sgpr30_sgpr31 = SI_CALL undef $sgpr6_sgpr7, @func, csr_amdgpu 301 $m0 = COPY %1 302 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 303 304... 305 306--- 307name: redef_m0_same_copy_multi_block 308tracksRegLiveness: true 309machineFunctionInfo: 310 isEntryFunction: true 311body: | 312 ; GCN-LABEL: name: redef_m0_same_copy_multi_block 313 ; GCN: bb.0: 314 ; GCN-NEXT: successors: %bb.1(0x80000000) 315 ; GCN-NEXT: liveins: $vgpr0, $sgpr0 316 ; GCN-NEXT: {{ $}} 317 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 318 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 319 ; GCN-NEXT: $m0 = COPY [[COPY1]] 320 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 321 ; GCN-NEXT: {{ $}} 322 ; GCN-NEXT: bb.1: 323 ; GCN-NEXT: $m0 = COPY [[COPY1]] 324 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 325 bb.0: 326 liveins: $vgpr0, $sgpr0 327 328 %0:vgpr_32 = COPY $vgpr0 329 %1:sgpr_32 = COPY $sgpr0 330 $m0 = COPY %1 331 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 332 333 bb.1: 334 $m0 = COPY %1 335 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 336 337... 338 339--- 340name: redef_m0_copy_self 341tracksRegLiveness: true 342machineFunctionInfo: 343 isEntryFunction: true 344body: | 345 bb.0: 346 liveins: $vgpr0, $sgpr0 347 348 ; GCN-LABEL: name: redef_m0_copy_self 349 ; GCN: liveins: $vgpr0, $sgpr0 350 ; GCN-NEXT: {{ $}} 351 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 352 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 353 ; GCN-NEXT: $m0 = COPY [[COPY1]] 354 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 355 ; GCN-NEXT: $m0 = COPY $m0 356 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 357 %0:vgpr_32 = COPY $vgpr0 358 %1:sgpr_32 = COPY $sgpr0 359 $m0 = COPY %1 360 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 361 $m0 = COPY $m0 362 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 363 364... 365 366--- 367name: redef_m0_copy_physreg 368tracksRegLiveness: true 369machineFunctionInfo: 370 isEntryFunction: true 371body: | 372 bb.0: 373 liveins: $vgpr0, $sgpr0 374 375 ; GCN-LABEL: name: redef_m0_copy_physreg 376 ; GCN: liveins: $vgpr0, $sgpr0 377 ; GCN-NEXT: {{ $}} 378 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 379 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr0 380 ; GCN-NEXT: $m0 = COPY $sgpr0 381 ; GCN-NEXT: [[DS_READ_B32_:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 0, 0, implicit $m0, implicit $exec :: (load (s32)) 382 ; GCN-NEXT: $sgpr0 = S_MOV_B32 0 383 ; GCN-NEXT: $m0 = COPY $sgpr0 384 ; GCN-NEXT: [[DS_READ_B32_1:%[0-9]+]]:vgpr_32 = DS_READ_B32 [[COPY]], 64, 0, implicit $m0, implicit $exec :: (load (s32)) 385 %0:vgpr_32 = COPY $vgpr0 386 %1:sgpr_32 = COPY $sgpr0 387 $m0 = COPY $sgpr0 388 %2:vgpr_32 = DS_READ_B32 %0, 0, 0, implicit $m0, implicit $exec :: (load (s32)) 389 $sgpr0 = S_MOV_B32 0 390 $m0 = COPY $sgpr0 391 %3:vgpr_32 = DS_READ_B32 %0, 64, 0, implicit $m0, implicit $exec :: (load (s32)) 392 393... 394