1; RUN: llc -mtriple=amdgcn -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 2; RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 3; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s 4 5 6; GCN-LABEL: {{^}}fdiv_f64: 7; GCN-DAG: buffer_load_dwordx2 [[NUM:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 8; GCN-DAG: buffer_load_dwordx2 [[DEN:v\[[0-9]+:[0-9]+\]]], off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:8 9; CI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]] 10; CI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], vcc, [[NUM]], [[DEN]], [[NUM]] 11 12; Check for div_scale bug workaround on SI 13; SI-DAG: v_div_scale_f64 [[SCALE0:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[DEN]], [[DEN]], [[NUM]] 14; SI-DAG: v_div_scale_f64 [[SCALE1:v\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, [[NUM]], [[DEN]], [[NUM]] 15 16; GCN-DAG: v_rcp_f64_e32 [[RCP_SCALE0:v\[[0-9]+:[0-9]+\]]], [[SCALE0]] 17 18; SI-DAG: v_cmp_eq_u32_e32 vcc, {{v[0-9]+}}, {{v[0-9]+}} 19; SI-DAG: v_cmp_eq_u32_e64 [[CMP0:s\[[0-9]+:[0-9]+\]]], {{v[0-9]+}}, {{v[0-9]+}} 20; SI-DAG: s_xor_b64 vcc, [[CMP0]], vcc 21 22; GCN-DAG: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[RCP_SCALE0]], 1.0 23; GCN-DAG: v_fma_f64 [[FMA1:v\[[0-9]+:[0-9]+\]]], [[RCP_SCALE0]], [[FMA0]], [[RCP_SCALE0]] 24; GCN-DAG: v_fma_f64 [[FMA2:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[FMA1]], 1.0 25; GCN-DAG: v_fma_f64 [[FMA3:v\[[0-9]+:[0-9]+\]]], [[FMA1]], [[FMA2]], [[FMA1]] 26; GCN-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[SCALE1]], [[FMA3]] 27; GCN-DAG: v_fma_f64 [[FMA4:v\[[0-9]+:[0-9]+\]]], -[[SCALE0]], [[MUL]], [[SCALE1]] 28; GCN: v_div_fmas_f64 [[FMAS:v\[[0-9]+:[0-9]+\]]], [[FMA4]], [[FMA3]], [[MUL]] 29; GCN: v_div_fixup_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[FMAS]], [[DEN]], [[NUM]] 30; GCN: buffer_store_dwordx2 [[RESULT]] 31; GCN: s_endpgm 32define amdgpu_kernel void @fdiv_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 { 33 %gep.1 = getelementptr double, ptr addrspace(1) %in, i32 1 34 %num = load volatile double, ptr addrspace(1) %in 35 %den = load volatile double, ptr addrspace(1) %gep.1 36 %result = fdiv double %num, %den 37 store double %result, ptr addrspace(1) %out 38 ret void 39} 40 41; GCN-LABEL: {{^}}v_fdiv_f64_afn: 42; GCN: v_rcp_f64_e32 v[4:5], v[2:3] 43; GCN: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0 44; GCN: v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5] 45; GCN: v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0 46; GCN: v_fma_f64 v[4:5], v[6:7], v[4:5], v[4:5] 47; GCN: v_mul_f64 v[6:7], v[0:1], v[4:5] 48; GCN: v_fma_f64 v[0:1], -v[2:3], v[6:7], v[0:1] 49; GCN: v_fma_f64 v[0:1], v[0:1], v[4:5], v[6:7] 50; GCN: s_setpc_b64 51define double @v_fdiv_f64_afn(double %x, double %y) #0 { 52 %result = fdiv afn double %x, %y 53 ret double %result 54} 55 56; GCN-LABEL: {{^}}v_rcp_f64_afn: 57; GCN: v_rcp_f64_e32 v[2:3], v[0:1] 58; GCN: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0 59; GCN: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3] 60; GCN: v_fma_f64 v[4:5], -v[0:1], v[2:3], 1.0 61; GCN: v_fma_f64 v[2:3], v[4:5], v[2:3], v[2:3] 62; GCN: v_fma_f64 v[0:1], -v[0:1], v[2:3], 1.0 63; GCN: v_fma_f64 v[0:1], v[0:1], v[2:3], v[2:3] 64; GCN: s_setpc_b64 65define double @v_rcp_f64_afn(double %x) #0 { 66 %result = fdiv afn double 1.0, %x 67 ret double %result 68} 69 70; GCN-LABEL: {{^}}fdiv_f64_s_v: 71define amdgpu_kernel void @fdiv_f64_s_v(ptr addrspace(1) %out, ptr addrspace(1) %in, double %num) #0 { 72 %den = load double, ptr addrspace(1) %in 73 %result = fdiv double %num, %den 74 store double %result, ptr addrspace(1) %out 75 ret void 76} 77 78; GCN-LABEL: {{^}}fdiv_f64_v_s: 79define amdgpu_kernel void @fdiv_f64_v_s(ptr addrspace(1) %out, ptr addrspace(1) %in, double %den) #0 { 80 %num = load double, ptr addrspace(1) %in 81 %result = fdiv double %num, %den 82 store double %result, ptr addrspace(1) %out 83 ret void 84} 85 86; GCN-LABEL: {{^}}fdiv_f64_s_s: 87define amdgpu_kernel void @fdiv_f64_s_s(ptr addrspace(1) %out, double %num, double %den) #0 { 88 %result = fdiv double %num, %den 89 store double %result, ptr addrspace(1) %out 90 ret void 91} 92 93; GCN-LABEL: {{^}}v_fdiv_v2f64: 94define amdgpu_kernel void @v_fdiv_v2f64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 { 95 %gep.1 = getelementptr <2 x double>, ptr addrspace(1) %in, i32 1 96 %num = load <2 x double>, ptr addrspace(1) %in 97 %den = load <2 x double>, ptr addrspace(1) %gep.1 98 %result = fdiv <2 x double> %num, %den 99 store <2 x double> %result, ptr addrspace(1) %out 100 ret void 101} 102 103; GCN-LABEL: {{^}}s_fdiv_v2f64: 104define amdgpu_kernel void @s_fdiv_v2f64(ptr addrspace(1) %out, <2 x double> %num, <2 x double> %den) { 105 %result = fdiv <2 x double> %num, %den 106 store <2 x double> %result, ptr addrspace(1) %out 107 ret void 108} 109 110; GCN-LABEL: {{^}}v_fdiv_v4f64: 111define amdgpu_kernel void @v_fdiv_v4f64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 { 112 %gep.1 = getelementptr <4 x double>, ptr addrspace(1) %in, i32 1 113 %num = load <4 x double>, ptr addrspace(1) %in 114 %den = load <4 x double>, ptr addrspace(1) %gep.1 115 %result = fdiv <4 x double> %num, %den 116 store <4 x double> %result, ptr addrspace(1) %out 117 ret void 118} 119 120; GCN-LABEL: {{^}}s_fdiv_v4f64: 121define amdgpu_kernel void @s_fdiv_v4f64(ptr addrspace(1) %out, <4 x double> %num, <4 x double> %den) #0 { 122 %result = fdiv <4 x double> %num, %den 123 store <4 x double> %result, ptr addrspace(1) %out 124 ret void 125} 126 127; GCN-LABEL: {{^}}div_fast_2_x_pat_f64: 128; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0.5 129; GCN: buffer_store_dwordx2 [[MUL]] 130define amdgpu_kernel void @div_fast_2_x_pat_f64(ptr addrspace(1) %out) #1 { 131 %x = load double, ptr addrspace(1) undef 132 %rcp = fdiv fast double %x, 2.0 133 store double %rcp, ptr addrspace(1) %out, align 4 134 ret void 135} 136 137; GCN-LABEL: {{^}}div_fast_k_x_pat_f64: 138; GCN-DAG: v_mov_b32_e32 v[[K_LO:[0-9]+]], 0x9999999a 139; GCN-DAG: v_mov_b32_e32 v[[K_HI:[0-9]+]], 0x3fb99999 140; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, v[[[K_LO]]:[[K_HI]]] 141; GCN: buffer_store_dwordx2 [[MUL]] 142define amdgpu_kernel void @div_fast_k_x_pat_f64(ptr addrspace(1) %out) #1 { 143 %x = load double, ptr addrspace(1) undef 144 %rcp = fdiv fast double %x, 10.0 145 store double %rcp, ptr addrspace(1) %out, align 4 146 ret void 147} 148 149; GCN-LABEL: {{^}}div_fast_neg_k_x_pat_f64: 150; GCN-DAG: v_mov_b32_e32 v[[K_LO:[0-9]+]], 0x9999999a 151; GCN-DAG: v_mov_b32_e32 v[[K_HI:[0-9]+]], 0xbfb99999 152; GCN: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, v[[[K_LO]]:[[K_HI]]] 153; GCN: buffer_store_dwordx2 [[MUL]] 154define amdgpu_kernel void @div_fast_neg_k_x_pat_f64(ptr addrspace(1) %out) #1 { 155 %x = load double, ptr addrspace(1) undef 156 %rcp = fdiv fast double %x, -10.0 157 store double %rcp, ptr addrspace(1) %out, align 4 158 ret void 159} 160 161attributes #0 = { nounwind } 162attributes #1 = { nounwind "unsafe-fp-math"="true" } 163