1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=CI -check-prefix=FUNC %s 3; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=CI -check-prefix=FUNC %s 4 5declare double @llvm.ceil.f64(double) nounwind readnone 6declare <2 x double> @llvm.ceil.v2f64(<2 x double>) nounwind readnone 7declare <3 x double> @llvm.ceil.v3f64(<3 x double>) nounwind readnone 8declare <4 x double> @llvm.ceil.v4f64(<4 x double>) nounwind readnone 9declare <8 x double> @llvm.ceil.v8f64(<8 x double>) nounwind readnone 10declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone 11 12; FUNC-LABEL: {{^}}fceil_f64: 13; CI: v_ceil_f64_e32 14; SI: s_bfe_u32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014 15; SI-DAG: s_and_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000 16; SI-DAG: s_addk_i32 [[SEXP]], 0xfc01 17; SI-DAG: s_lshr_b64 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], [[SEXP]] 18; SI-DAG: s_andn2_b64 19; SI-DAG: cmp_gt_i32 20; SI-DAG: s_cselect_b32 21; SI-DAG: s_cselect_b32 22; SI-DAG: cmp_lt_i32 23; SI-DAG: s_cselect_b32 24; SI-DAG: s_cselect_b32 25; SI-DAG: v_cmp_gt_f64_e64 [[FCMP:s[[0-9]+:[0-9]+]]] 26; SI-DAG: v_cmp_lg_f64_e32 vcc 27; SI-DAG: s_and_b64 [[AND1:s[[0-9]+:[0-9]+]]], [[FCMP]], vcc 28; SI-DAG: s_and_b64 [[AND1]], [[AND1]], exec 29; SI-DAG: s_cselect_b32 s{{[0-9]+}}, 0x3ff00000, 0 30; SI: v_add_f64 31; SI: s_endpgm 32define amdgpu_kernel void @fceil_f64(ptr addrspace(1) %out, double %x) { 33 %y = call double @llvm.ceil.f64(double %x) nounwind readnone 34 store double %y, ptr addrspace(1) %out 35 ret void 36} 37 38; FUNC-LABEL: {{^}}fceil_v2f64: 39; CI: v_ceil_f64_e32 40; CI: v_ceil_f64_e32 41define amdgpu_kernel void @fceil_v2f64(ptr addrspace(1) %out, <2 x double> %x) { 42 %y = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x) nounwind readnone 43 store <2 x double> %y, ptr addrspace(1) %out 44 ret void 45} 46 47; FIXME-FUNC-LABEL: {{^}}fceil_v3f64: 48; FIXME-CI: v_ceil_f64_e32 49; FIXME-CI: v_ceil_f64_e32 50; FIXME-CI: v_ceil_f64_e32 51; define amdgpu_kernel void @fceil_v3f64(ptr addrspace(1) %out, <3 x double> %x) { 52; %y = call <3 x double> @llvm.ceil.v3f64(<3 x double> %x) nounwind readnone 53; store <3 x double> %y, ptr addrspace(1) %out 54; ret void 55; } 56 57; FUNC-LABEL: {{^}}fceil_v4f64: 58; CI: v_ceil_f64_e32 59; CI: v_ceil_f64_e32 60; CI: v_ceil_f64_e32 61; CI: v_ceil_f64_e32 62define amdgpu_kernel void @fceil_v4f64(ptr addrspace(1) %out, <4 x double> %x) { 63 %y = call <4 x double> @llvm.ceil.v4f64(<4 x double> %x) nounwind readnone 64 store <4 x double> %y, ptr addrspace(1) %out 65 ret void 66} 67 68; FUNC-LABEL: {{^}}fceil_v8f64: 69; CI: v_ceil_f64_e32 70; CI: v_ceil_f64_e32 71; CI: v_ceil_f64_e32 72; CI: v_ceil_f64_e32 73; CI: v_ceil_f64_e32 74; CI: v_ceil_f64_e32 75; CI: v_ceil_f64_e32 76; CI: v_ceil_f64_e32 77define amdgpu_kernel void @fceil_v8f64(ptr addrspace(1) %out, <8 x double> %x) { 78 %y = call <8 x double> @llvm.ceil.v8f64(<8 x double> %x) nounwind readnone 79 store <8 x double> %y, ptr addrspace(1) %out 80 ret void 81} 82 83; FUNC-LABEL: {{^}}fceil_v16f64: 84; CI: v_ceil_f64_e32 85; CI: v_ceil_f64_e32 86; CI: v_ceil_f64_e32 87; CI: v_ceil_f64_e32 88; CI: v_ceil_f64_e32 89; CI: v_ceil_f64_e32 90; CI: v_ceil_f64_e32 91; CI: v_ceil_f64_e32 92; CI: v_ceil_f64_e32 93; CI: v_ceil_f64_e32 94; CI: v_ceil_f64_e32 95; CI: v_ceil_f64_e32 96; CI: v_ceil_f64_e32 97; CI: v_ceil_f64_e32 98; CI: v_ceil_f64_e32 99; CI: v_ceil_f64_e32 100define amdgpu_kernel void @fceil_v16f64(ptr addrspace(1) %out, <16 x double> %x) { 101 %y = call <16 x double> @llvm.ceil.v16f64(<16 x double> %x) nounwind readnone 102 store <16 x double> %y, ptr addrspace(1) %out 103 ret void 104} 105